We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
I try to use 128K Flash memory of 89C51RE2 and its memory layout as the following:
0x0000 - 0xFFFF (common area) 0x10000 - 0x17FFF (bank 1) 0x18000 - 0x1FFFF (bank 2)
I am using BL51 and OC51 to generate B01, B02, B03 files...
I look at the memory location 0x10000, I saw common codes start from 0x10000. How do I disable common code place into bank1 area?
Best regards, Thomas.
This is written based on the assumption that the 89C51RE2 is similar to the SILabs 128k derivatives, if the 89C51RE2 uses 'MX technology' (3 byte push at subroutine call, EPC SFR), then you do not need banking.
You can't do that, the processor can only address 64k. Thus all memory must appear to reside between 0x0000 and 0xFFFF.
the common scheme is bank 0 0x00000 - 0x07FFF (always there) bank 1 0x08000 - 0x0FFFF addressed as 0x8000 - 0xffff bank 2 0x10000 - 0x17FFF addressed as 0x8000 - 0xffff bank 3 ox18000 - 0x1FFFF addressed as 0x8000 - 0xffff
Erik
The hex files for banked code are a little odd. Every bank takes up 64KB, with the common code repeated in the bottom 32KB. This kind of hex file is used for hardware that does 64KB banks.
See the MERGE32K directive for OHX51. This "packs" the code so that the common bank is the bottom 32K, with each other bank following, which is probably the layout you expect.
How do I know I get 89C51RE2 'MX technology'? I got engineer sample chip from Atmel with part number: 89C51RE2-EM / 0644 C5T7244-1
Atmel has no MX technology.
See: http://www.keil.com/forum/docs/thread10607.asp