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Hello all, A colleague of mine is dealing with a problem: he seems to be missing edge triggered interrupts. I checked the code but I couldn’t find long periods during which IEN or for that matter the respective control registers IE flags are disabled. So I am considering the integrity of the signals themselves. I had a look at the electrical properties of the XC167 but I didn't manage to find minimum/maximum interrupt rise/fall time, interrupt hold time, etc. Can you help me find this information? Thanks in advance
Hi, Sorry - it is a XC167CS.
Greetings.
XC167 User's Manual Volume 1:
"An external interrupt signal is safely recognized in two cases: - if it is active for more than 100 ns (async. logic with spike filter), or - if it is active for more than 2 cycles of fSYS (sync. logic). The interrupt signal is recognized after whatever condition becomes true first."
You need not worry about losing interrupts due to disabling a single source or all interrupts globally, the interrupt is still recognized and remains pending. You may miss a repeated interrupt though.
Sauli