WHAT WILL HAPPEN WHEN INTERRUPT OCCUS IN 8051?

HV,

This is certainly something you could find out in any good 8051 datasheet or textbook, but here are the general answers:

1. When an interrupt is serviced by the hardware, it disables all interrupts AT THE SAME PRIORITY LEVEL. So, if a low-priority interrupt occurs, at the moment the MCU decides to service it, all other low priority interrupts are disabled until your ISR issues a RETI instruction to re-enable them.

2. You need to push the contents of any registers you plan to use and then pop them at the end of the routine. This prevents your "main code" from running into problem when registers change outside its control. Alternatively, you can use the 8051's register bank switching to speed things up. If all of your low-priority ISRs use register bank 1, while all your main code uses register bank 0, you could just switch register banks and then switch back before returning from the ISR.

3. RETI, as I suggested above, tells the processor to re-enable interrupts at the same priority as the one currently being serviced. If you use a RET command, your interrupt system will be essentially shut down for that priority level.

4. As you have probably noticed in reading the datasheet, for some interrupts, the hardware clears the flag automatically when it vectors to the ISR. In other cases (like the serial interrupt), you must clear it in software. The general reasoning is this: If a SINGLE ISR could have MULTIPLE flags that caused it (like RI/TI in the serial int), then you will have to clear the flag yourself.

Hope some of that helps.

-Jay Daniel

HV,

This is certainly something you could find out in any good 8051 datasheet or textbook, but here are the general answers:

1. When an interrupt is serviced by the hardware, it disables all interrupts AT THE SAME PRIORITY LEVEL. So, if a low-priority interrupt occurs, at the moment the MCU decides to service it, all other low priority interrupts are disabled until your ISR issues a RETI instruction to re-enable them.

2. You need to push the contents of any registers you plan to use and then pop them at the end of the routine. This prevents your "main code" from running into problem when registers change outside its control. Alternatively, you can use the 8051's register bank switching to speed things up. If all of your low-priority ISRs use register bank 1, while all your main code uses register bank 0, you could just switch register banks and then switch back before returning from the ISR.

3. RETI, as I suggested above, tells the processor to re-enable interrupts at the same priority as the one currently being serviced. If you use a RET command, your interrupt system will be essentially shut down for that priority level.

4. As you have probably noticed in reading the datasheet, for some interrupts, the hardware clears the flag automatically when it vectors to the ISR. In other cases (like the serial interrupt), you must clear it in software. The general reasoning is this: If a SINGLE ISR could have MULTIPLE flags that caused it (like RI/TI in the serial int), then you will have to clear the flag yourself.

Hope some of that helps.

-Jay Daniel

clarifying what Jay say above:
AT THE SAME PRIORITY LEVEL
refer to "priority as defined in the IP SFR".
the 'other priority' that you see in the datasheet only apply if interrupts happen at the exact same time.

Erik