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I'm using the logic analyzer on uvision3 to view the signal generated from the PWM chanal 0; the code success to generate the signal on the hardware platform but I actually tweaking the code(adding PW0 as a signal on the setup on the logic analyser). the level of the signal is not as expected while it's correct on PWM Module window(from peripherals) thanks for help
Are you using the current version of the C166 package?
No, I'm using the version 5.05(I mean the C166 C Compiler)
Please use the latest version, since we have solved a similar problem a while back ago.