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Here is the scenario. I am working with C167CS
The bootstrap loader is loaded between FA60 to FC00 in the internal memory.
It in turn loads a small program into the XRAM E000 to E7FF.
This is setup has worked well for us for the past 8 years unfortunately the program has now changed and cannot fit completely into the XRAM.
I have created another module and placed it at F600 to FA00 in the internal memory.
My link looks like this:
MAIN.OBJ, FLASHLDR.OBJ, SERTIMER.OBJ TO flashldr CLASSES (FCODE(0FA60H)) & SECTIONS(?PR?FLASHLDR%FCODE(0E000H), ?PR?SERTIMER%FCODE(0F600H))
My initialization looks like this:
#pragma asm ADDRSEL1 DEFR 0FE18H ADDRSEL2 DEFR 0FE1AH DISWDT // Disable watchdog timer MOV SYSCON,#6184H // Stack size = 32 words, XRAM enabled NOP MOV DPP0,#0 // Set the data page pointer to point at 1st 4 pages MOV DPP1,#1 // which is all of internal memory MOV DPP2,#2 MOV DPP3,#3 NOP MOV ADDRSEL1,#0803H // CS1 active starting at 08'0000 (RAM) NOP MOV BUSCON0,#04AFH // CS is independent of write NOP MOV BUSCON1,#04AFH // CS is independent of write // EEPROM MOV ADDRSEL2,#0C06H // CS2 active starting at 0C'0000 // CS2 block size is 256 kbytes NOP NOP MOV BUSCON2,#040AH // CS is independent of write // CS is independent of read // External bus controlled by MCTC only // External bus is enabled // ALE is normal length // 8 bit demultiplexed bus // One tristate wait states // Delay read/write 1 TCL after ALE // 5 wait states EINIT #pragma endasm
I load the new module like this:
BYTE idata *pbIramPtr; BYTE bLastByte; // Load interal ram code -> continue loading FLASHLDR.SRE YES - ITSELF ! // This code loads all the code in SERTIMER.C // The code is loaded to internal memory for ( pbIramPtr = (BYTE idata *)0xF600; pbIramPtr != (BYTE idata *)0xFA00; pbIramPtr++ ) { // Wait for a byte to come in on the serial port while (! S0RIR); // Store the byte in internal ram bLastByte = S0RBUF; *pbIramPtr = bLastByte; // See if the byte was stored correctly if (bLastByte != *pbIramPtr) { // Store failed, send XRAM error and lockup putbyte(XRAM_WRITE_ERROR); while(1); } // Clear receive interrupt flag S0RIR = 0; }
Is there any reason that this shouldn't work?
There are 2 sections of XRAM. I ended up using the 6k portion of XRAM and the problem is solved. I am still curious to know what went wrong with my effort above.