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Size of an microcontroller or processor architecture depends on whteher the address bus or data bus or ALU or all the three
I would have thought that the "size" referred to the length of the instructions which are fetched from code memory...
-=Rich=-
I would have thought that the "size" referred to the length of the instructions which are fetched from code memory... HUH?
e.g. the '51 has 1,2,3 and 4 byte long instructions. Most (all?) computers I have worked with have had a variable instruction length.
Erik
I would suggest: The width of the working register(s) is relevant for the width of processor architecture.
Few examples: *8051 ist a 8bit machine, although it has 16bit DPTR and 16bit addressing space. *Intel Pentium III ist a 32bit machine, it has also 32bit addressing space. *Intel Core2Duo ist a 64bit machine, although it has 128bit special SSE registers (and some legacy 32bit registers!), it has only 36bit addressing space.
...the "size" referred to the length of the instructions which are fetched from code memory... is irrelevant, as Erik already said. For example, a PIC 8bit µC has 14bit 16bit or 18bit opcodes (depends on appropriate family e.g. PIC18Cxxx has 18bit opcodes).
A little off topic @Erik: An 8051 has 4-byte instruction(s)? By which OpCodes? I know only 1-, 2- and 3-byte instructions for 8051.
Martin
A little off topic @Erik: An 8051 has 4-byte instruction(s)? By which OpCodes? I know only 1-, 2- and 3-byte instructions for 8051. neither do I, I got carried away typing numbers :)
"Size" doesn't matter.
Or at least for almost any practical purpose you need to be a lot more specific about which part of the CPU you're talking about. As this thread shows, trying to characterize an architecture with a single scalar number is a bit too simplistic to mean much.
When people say "it's a X-bit processor", in my experience they generally mean the width of the internal general-purpose data registers used for computation. The address and data busses of particular implementations often vary. Address spaces often get complicated with segmenting / paging / banking schemes.
The Intel 8086 had a 16-bit data bus; the 8088 had an 8-bit data bus, with the CPUs otherwise largely identical: variable length instructions, 16-bit registers, 16-bit internal data paths, 20-bit address bus (using segment registers internally). Most people called both of them "16-bit processors".
The 68000 had variable length instructions, 32 bit registers, a 16-bit data bus, and a 24-bit address bus. Internally, addresses were 32 bits, but only 24 came out, as Apple found out to their chagrin when they switched to 68020s. Turned out a few too many programmers were being "efficient" and using that upper byte of the address to store data, confident in the knowledge that those bits would never actually appear on the address bus...
ARM7s have 32-bit registers, fixed 32-bit instructions, and a 16-bit data bus, so many operations take two memory accesses. Most people call all ARMs "32-bit processors".
It gets complicated in detail.
life's like that!