50nS delay generation on LPC2129

Running the chip at 60MHz just to get 10MHz, would probably be a contender for the worlds most power-inefficient 10MHz generator... If complemented with interrupts for other functions, it would also be the worlds most unstable frequency generator.

1) You wouldn't have got a long discussion about SI units, unless your answer to my footnote was that nS really did mean nanoseconds. That was a schoolbook example of how to start a debate.

2) You have never told us how much jitter and frequency error you can accept.

3) You have never told us why you do not want to look at the timers. Just "wanting to" is not a reason.

4) Your original post talked about a 50ns delay, instead of a 10MHz frequency. Only in a theoretical world are the two concepts interchangeable.

5) You have not told us if you need just a short burst, or if you need a continuous signal. A continuous signal needs time for a jump instruction too, since you can't have an infinitely unrolled loop. And a way to end the loop - unless the chip should generate 10MHz until power is removed... If you don't like timers/interrupts for the signal generation, then our assumption must be that you don't like interrupts for ending the generation either! Hence, an if statement and a loop counter is required.

6) I - and most other people on this forum - don't need 10MHz output from the chip. However, the timers are in a class of their own when it comes to generation of square-wave output with low jitter and constant frequency with a minimum of power consumption and processor load. Since you - and not I - need 10MHz, my recommendation was for you to look in the data sheet for support for 10MHz using the timers.

Somehow, I get the feeling that if we don't post finished code for a 10MHz generator, you are not satisfied with our answers. Why do you expect that? And why no feedback why you only accept a sw solution, even if the chip has to more or less break it's back to manage it?

Running the chip at 60MHz just to get 10MHz, would probably be a contender for the worlds most power-inefficient 10MHz generator... If complemented with interrupts for other functions, it would also be the worlds most unstable frequency generator.

1) You wouldn't have got a long discussion about SI units, unless your answer to my footnote was that nS really did mean nanoseconds. That was a schoolbook example of how to start a debate.

2) You have never told us how much jitter and frequency error you can accept.

3) You have never told us why you do not want to look at the timers. Just "wanting to" is not a reason.

4) Your original post talked about a 50ns delay, instead of a 10MHz frequency. Only in a theoretical world are the two concepts interchangeable.

5) You have not told us if you need just a short burst, or if you need a continuous signal. A continuous signal needs time for a jump instruction too, since you can't have an infinitely unrolled loop. And a way to end the loop - unless the chip should generate 10MHz until power is removed... If you don't like timers/interrupts for the signal generation, then our assumption must be that you don't like interrupts for ending the generation either! Hence, an if statement and a loop counter is required.

6) I - and most other people on this forum - don't need 10MHz output from the chip. However, the timers are in a class of their own when it comes to generation of square-wave output with low jitter and constant frequency with a minimum of power consumption and processor load. Since you - and not I - need 10MHz, my recommendation was for you to look in the data sheet for support for 10MHz using the timers.

Somehow, I get the feeling that if we don't post finished code for a 10MHz generator, you are not satisfied with our answers. Why do you expect that? And why no feedback why you only accept a sw solution, even if the chip has to more or less break it's back to manage it?