I am currently using timer2 count a number of preset timeouts on an AC waveform for an AC regulator.
I have given timer2 the highest interrupt priority, but have found that occasionally timer1 (used for generally polling), which is at a lower priority level, interrupts timer2's routine.
I have run the debugger; timer2's priority is definitely greater than timer1.
I have been sure to clear the timeout flag before the pending flag is cleared at the end of each timer interrupt function.
Have I misunderstood? The impression I got from the manual is that a lower priority will only execute after the higher priority has exited its interrupt?
Hi, Atleast In the LPC series using ARM7 have 15 as lowest priority. Also in general the ARM7 priority mechanism is to have lower the number higher the priority. Ref: ARM manual.
Suvidh
I managed to solve the problem today.
For those that are interested, the priority structure is 15 highest 1 lowest.
The point that was messing me around is that a higher priority interrupt will win over lower priority but only after whatever interrupt is active is complete.
A higher priority interrupt will not interrupt a lower priority until the lower priorities pending flag is cleared, signifying it has been serviced.
In order to have a higher priority interrupt a lower priority while it is running you need to look at nested interrupts. Be aware that nested interrupts take up more resources.