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Problem using the SPI HW of TSC80251G2D on MCBx51

Hi,

I have followed the guidelines from Designers Guide for the Atmel TSC80251G2D controller to implement an SPI master with polling policy.
When testing on the MCBx51 eval. board I do get the 8 clock cycles on the SCK line(P1.6).

However on the MOSI line I get some data which are incorrect and also not synchronized with the clock.

I append the initialization code and the function trying to read the status register from a serial eeprom (SPI Slave).

Any ideas where the problem might be?



void spi_initialize (void){
SSMOD = 1;
SSIE = 0;
SSMSTR = 1;
SSBRS = 0;
SSCR1 = 1;
SSCR0 = 0; SSCPOL = 1;
SSCPHA = 1;
SSBSY = 0;
SSI = 0;
SSPE = 1;
}

unsigned char
read_rdsr (unsigned char slaveSelect){

unsigned char data_in;
unsigned char slaveMask = (1 << slaveSelect);

P1 = P1 ^ slaveMask; // chipselect
SSDAT = RDSR; //0x05
SSBSY = 1;
while(SSBSY);
SSI = 0;
SSDAT = dummyByte;
SSBSY = 1;
while(SSBSY);
SSI = 0;
P1 = P1 ^ slaveMask;
data_in = SSDAT;
return data_in;
}

Parents
  • We are not aware of problems here, however the SPI interface shares the P1.7 line which is also an address line.

    It is therefore improtant to:

    - switch off P1.7 on MCBx51
    - change the CONFIG bytes so that only 128KB memory are addressed.

    The address locations of the CONFIG bytes is listed in the MCBx51 user's guide on page 31.

Reply
  • We are not aware of problems here, however the SPI interface shares the P1.7 line which is also an address line.

    It is therefore improtant to:

    - switch off P1.7 on MCBx51
    - change the CONFIG bytes so that only 128KB memory are addressed.

    The address locations of the CONFIG bytes is listed in the MCBx51 user's guide on page 31.

Children
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