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Code Banking: Different banks reference to a table that store in CODE memory

Dear all,
My project using code banking.
I have a table that store in CODE memory(BANK1(?CO?MENUROOT(0x2000))).
And my program in many Banks(Bank1, Bank2, Bank3......) reference to this table. But only program in bank1 can get the correct table value.
Because a lot of reasons, I have to seperate these programs into different banks. And I don't want to create many copy of this table in defferent name to put them in each bank.
How can I solve this problem?
Thank you.

Ovid.

Parents
  • My entire program is in nand flash, It will be fetch into onchip ram(only 16k bytes), and execute.
    That sounds like something I have missed "execute from onchip RAM" which chip is that?

    "There is no time for me to develope this tool and debug。
    the hang it up. How do you expect to do anything if you do not have the time to do it?

    Working overtime is not a cost to my company.
    Oh yes, it is. The craizest reasons I have seen for "little glitches" has come from excessive overtime groups.

    Erik

Reply
  • My entire program is in nand flash, It will be fetch into onchip ram(only 16k bytes), and execute.
    That sounds like something I have missed "execute from onchip RAM" which chip is that?

    "There is no time for me to develope this tool and debug。
    the hang it up. How do you expect to do anything if you do not have the time to do it?

    Working overtime is not a cost to my company.
    Oh yes, it is. The craizest reasons I have seen for "little glitches" has come from excessive overtime groups.

    Erik

Children
  • ARM-derivatives are _very_ competitively priced

    Maybe as discrete ICs. But not as cores for integration into an ASIC. Decent 8051 cores are available that are literally free of both NRE and royalty charges. ARMs are not. And even an ARM7 is about 15 times the die area of an 8051, around 150,000 gates instead of 10,000. This is a noticeable proportion of even a fairly big and complicated chip.

    There are sometimes reasons to execute out of RAM. I don't know of any commonly available flash with less than about 70ns access time. I have a project that happens to be clocked at 62.5 MHz, or 32ns access time for a program store fetch. Flash isn't fast enough; we have to execute out of SRAM. As it happens, this also lets us get away with loading from a serial flash, which saves us a lot of cost, board area and layers, and pins, which in turn lets us squeeze into a cheaper package. Executing directly out of flash would add a lot of cost, direct and indirect, in this particular case. Volumes are in millions, so even tiny cost savings can buy you a lot of engineering time.

    In contrast, I once had a project that was a one-off implementation to control some machinery. A volume of 1 has exactly the opposite economics. Development time will swamp the production cost.

    On the main topic: if the OP's system copies code from flash to RAM, and executes out of RAM, then presumably the entire RAM space is mapped into the xdata address space. Otherwise, how would it be writeable at all? In that case, the "code memory" table is already located in xdata. No extra memory would be required. Just translate the code address to the xdata address.