Hi, I am generating pulse output through 8051 microcontroller using assembly langauge. I don't wnat to use any timer for time delay, I would like to use instruction delays as follows... CLR portbit......3 cycles NOP..............1 cycle NOP..............1 cycle NOP..............1 cycle SETB portbit.....3 cycles NOP..............1 cycle NOP..............1 cycle NOP..............1 cycle CLR portbit......3 cycles 6cycles ---| |-------| |-------| | 6cycles OFF time = 1+1+1+3 ON time = 1+1+1+3 Is it my calculation is correct here?. SETB portbit.....3 cycles will be added into OFF time or ON time? Please comment on this... Thanks in advance Rajesh
hi, why just not read hardware manual. For example, Atmel hardware manual says: Writing to a Port When an instruction changes a port latch value, the new value arrives at the latch during S6P2 of the final cycle of the instruction. However, port latches are sampled by their output buffers only during Phase 1 of any clock period. (During Phase 2, the output buffer holds the value sampled during the previous Phase 1). Consequently, the new value in the port latch does not actually appear at the output pin until the next Phase 1, which is at S1P1 of the next machine cycle. See Figure 39 in the Internal Timing section. If the change requires a 0-to-l transition in Port 1, 2, or 3, an additional pullup is turned on during S1P1 and S1P2 of the cycle in which the transition occurs to increase the transition speed. The extra pullup can source about 100 times the current that the normal pullup can. The internal pullups are field-effect transistors, not linear esistors. The pullup arrangements are shown in Figure 5. In your case the duty cycle will be about 50% (meandre). Regards, Oleg