Memory Accelerator Module simulation not available in Philips LPC2294? I debug the program of Philips LPC2294 by software, and I found the States counter seem didn't right. I copy part of the disassemble code as follow: 113: toSPS_IOin_setbit_dcpl.U32=IOin_setbit; 0x00009258 E51432E8 LDR R3,[R4,#-0x02E8] 0x0000925C E5043280 STR R3,[R4,#-0x0280] instruction LDR cost 142 states, instruction STR cost 141 states. So I doubt that the instruction really need so many states? You know, even if we use 60MHz clock, when we evaluate a variable to another variable, it will cost more than 4us time. Then the ARM capability seem no better than a 51, that seem impossible. The simulation of the CPU states not right or memory accelerator module simulation not available in Philips LPC2294?