Hey all, I am using uVision 3 and a Phytec 2294 board. I have an external memory device connected to the phytec expansion board. The external device is using /CS0, although from talking to phytec, I am not sure if that is quite right. I have set up the external memory space in the project options like so: Start: 0x80000000 Size: 0x4 When I define a variable like :
#define volatile var x __at 0x8000000
That is an artifact of using this type of toolchain. If you were doing it all with simple command-line compile/link/load tools, you wouldn't have to mess with it. Now there you're IMHO being a bit overly negative. Fact is, with such simpler tools, you just wouldn't have a simulator to be told about the existence (or not) of memory at given addresses on the simulated hardware. Calling the need to configure each part of the toolchain, which implies that having more elements in it will mean more configuration items to fill in, an artifact doesn't do it justice.
None of my comments were intended to be negative per se. There is a very clear distinction between configuration that has to be done to keep a toolchain happy and configuration that has to be done to make the hardware work. Nothing discussed so far has cleared up whether some toolchain settings actually have an effect on the hardware. I am wasting my time trying to help with what appears to be a very simple software/hardware integration issue when there are nuances to a toolchain that I can't see which are fogging up my glasses. When I am debugging software/hardware integration issues (e.g., a chip select), I remove as many sources of extraneous unknown variables as I can. But that's just me.