How to do a memtest in 8051

Hello,

my design requires a built-in-test. the memtest must find approx. 90% of memory failures.

Hello,

my design requires a built-in-test. the memtest must find approx. 90% of memory failures.

"my design requires a built-in-test. the memtest must find approx. 90% of memory failures"

Fill the memory with a pseudo-random pattern and read it back. If your hardware design is proven, though, I'd say you're probably wasting your time.

in the olden days, when computers were steam driven and the king of diamonds were still a jack, memory failures did occur quite frequently. Today, after silicon was found useful, I do not recall a memory failure.

With more than 50.000 uCs running out there, I recall no repair due to memory failures.

So, if you do not have anything better to do, by all means, make a memory check. m Otherwise I suggest you get on with some real work :).

Erik

"the memtest must find approx. 90% of memory failures."

That sounds pretty pointless - if you're going to do a memory test at all (and others have already questioned the value of that), you need it to find 100% of failures.

Anyhow, you need to read this:

http://www.netrino.com/Articles/MemoryTesting/

It explains the nature of memory failures, what you need to do to ensure that you can detect them all, and includes sample code.

I've used it on an 8051, and it works.

When finding "90% of errors", it helps to define the sorts of errors you expect to find. Bus connection errors? Bus timing errors? Actual retention or integrity problems in the memory bits?

When bringing up prototype hardware, it can be useful to have a memory test routine to validate the layout. You could probe each line by hand with a continuity tester, but that's slow and error prone. Running a memory test is a quick way to make sure all the expected memories are actually decoded to the right addresses and with the address and data busses wired up correctly.

As a low volume manufacturing test, it can be useful to check for solder bridges on the board and the like. (I say "low volume" because high volume factory production is perhaps more likely to use a JTAG test setup to verify the integrity of the board. But some will still want a board to have a built-in test.)

I've found memory tests useful to double-check internal memories in ASICs, particularly the engineering samples before the factory test program is up and running, and also to test the test program when it is up and running. You have to test the tests, after all.

Finally, there's just plain old-fashioned requirements. Even if you're really sure there's no possibility of memory failure with modern devices, you're not going to convince a telecomm company or a government agency to abandon their existing standard reliability requirements just for you, even if you're right. If the customer requirements insist on built-in memory integrity tests, or else they won't qualify a device for purchase, you have little choice but to put them in.