How to let Logic Analyzer Window display WR ,RD, XBNE0, address A0 ,ALE and so on signals? Under simulation, I want to use the uv3(2.20) Logic Analyzer analysis the ADuC7026(ARM7TDMI)'s above signal's sequence chart. Who can tell me how to do it?
Sorry BUS signals cannot be displayed with the Logic Analyzer. See also uVision3 User's Guide, Logic Analyzer, Restrictions. Reinhard