Memory for XC167

"Basically I'm not far enough along to know how fast you can actually access memory, i.e. how many instruction cycles? Is fast sram (10ns) much faster than standard sram with a 70ns response time? The XC167 is only 40Mhz. I know the memory itself is much faster, but is there really a big difference in this application?"

This really depends on many things, but I would guess that 70ns is fast enough. The fastest loop to copy data from one place to another I can think of looks something like this:

; R1 = source address
; R2 = destination address
; R3 = address of R0
; R4 = source data end address

LOOP:  MOV  R0,[R1+]    ;read source word
       MOV  [R2+],[R3]  ;write to destination
       CMP  R1,R4       ;end of data?
       JMPR cc_ULT,LOOP ;jump if not

The fastest execution time of this loop at 40MHz is 100ns if it executes from the XC167 Program RAM and the core doesn't have to wait for data read/write to complete. So this is too fast for 70ns RAM only if the source and destination are on the same RAM. If there is only one access to the RAM in the loop or the code executes from anywhere else than Program RAM, 70ns will do.

If you really need as much RAM as you say, you will be using far, huge or xhuge memory type to access it, which adds to the loop execution time unless you go through the trouble of writing it in assembly using DPP addressing as in my example.

This was my estimation which may well be wrong. Infineon has quite good documentation about the timing, but so many things affect it that it is difficult to calculate what the actual timing will be.

Sauli

"Basically I'm not far enough along to know how fast you can actually access memory, i.e. how many instruction cycles? Is fast sram (10ns) much faster than standard sram with a 70ns response time? The XC167 is only 40Mhz. I know the memory itself is much faster, but is there really a big difference in this application?"

This really depends on many things, but I would guess that 70ns is fast enough. The fastest loop to copy data from one place to another I can think of looks something like this:

; R1 = source address
; R2 = destination address
; R3 = address of R0
; R4 = source data end address

LOOP:  MOV  R0,[R1+]    ;read source word
       MOV  [R2+],[R3]  ;write to destination
       CMP  R1,R4       ;end of data?
       JMPR cc_ULT,LOOP ;jump if not

The fastest execution time of this loop at 40MHz is 100ns if it executes from the XC167 Program RAM and the core doesn't have to wait for data read/write to complete. So this is too fast for 70ns RAM only if the source and destination are on the same RAM. If there is only one access to the RAM in the loop or the code executes from anywhere else than Program RAM, 70ns will do.

If you really need as much RAM as you say, you will be using far, huge or xhuge memory type to access it, which adds to the loop execution time unless you go through the trouble of writing it in assembly using DPP addressing as in my example.

This was my estimation which may well be wrong. Infineon has quite good documentation about the timing, but so many things affect it that it is difficult to calculate what the actual timing will be.

Sauli