Under simulation, can I use UV3 for ARM IDE's logic analyzer to analysis the ADuC7026's signals at P0.2 & P0.1, which configured as XBEN0 and XBEN1. If it is possible, how can I let the signals display on the logic analyzer window?
In CARM V2.20 (the current release of the Keil ARM toolchain) you may simply enter: PORT0.1 as a new signal in the Logic Analyzer. More information in the uVision3 on-line help under Logic Analyzer. Reinhard
I use PORT0.1 and LA PORT0.1 command all lead error 77:invalid bit address!! the uv3 cannot identify PORT0.1 signal!
You need to enter this directly in the Setup - Logic Analyzer dialog.