I am using P89LVRD2BN which has 768 XDATA RAM.I tried to extend my XDATA by providing external RAM through 74LS373 LATCH. so when I am definig more XDATA variables,I am expecting the variables shuld automatically assignd the addresses in External RAM. But these thing are not happening. My settings are EXTRAM = 0 and AO = 0.(Reset Values)
When EXTRAM=0, core attempts to access internal XRAM with address specified in MOVX instruction. If address supplied with this instruction exceeds on-chip available XRAM, off-chip XRAM is going to be selected and accessed. When EXTRAM=1 every MOVX @Ri/@DPTR instruction targets external data memory by default. This is the thing mentioned in Datasheet. So,in my 1st attempt,I made EXTRAM=0,and I defined 3 buffers each fo size 500bytes.so totally 1500bytes which exceeds 768 bytes of internal XRAM.so I expect the remaining bytes must have got allocated in interfaced External RAM(OFF-CHIP XRAM).But it is not behaving like that. EXTRAM=1,nothing is working. In both the case AO = 0
best guess hardware what speed the processor what access time the memory what memory chip show cchematic Erik
RAM's access time is in interms of nanoseconds. My controller is working with 11.0592Mhz so takes 1.085microsecond for every instruction which is much much greater than RAM access time. schematic: I dont know how to upload it,but it is tradition way of expanding the RAM,like demultiplexing the lower order address/data by 74LS373 latch which is enabled and disabled by ALE, then directly shorting higher order address lines to RAM, then /RD and /WR pins of microcontroller to /OE and /WE pin of RAM. I dont think there is any problem in schematic and also with program. wht may be the problem?.
On the RAM data sheet do you have any additional enable pins? What RAM chip are you using? Many RAM chips have additional enable pins. Have you run in the simulator? Write some known data to your buffers and examine the XDATA memory area in the simulator. For your target debug,look at the _at_ keyword and place a single var at an address in XDATA and scope the address lines. Show a minimum code fragment of how you define and access you external XDATA. Bradford
RAM's access time is in interms of nanoseconds. My controller is working with 11.0592Mhz so takes 1.085microsecond for every instruction which is much much greater than RAM access time. these 2 numbers are NOT related, you need 70ns or better. Erik