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xdata on MSC1200Y3

From the TI MSC1200Y3 documentation there is supposed to be 1024 bytes of xdata (0-0x400) available on the device. The following simple program compiles and links with no errors, but when it runs the output value shows 0xFFFF as though there is no RAM there. It runs as expected in the simulator. It runs as expected if XDATA is defined to idata, so it is probably not a logic or compiler issue.

I've tried setting the Target Options "Off chip Xdata Memory" to :
Start = 0
Size = 0x400
and I've tried modifying the Startup.A51 values:
XDATASTART EQU 0H ; the absolute start-address of XDATA memory
XDATALEN EQU 0400H ; the length of XDATA memory in bytes.

But neither of these have helped, I still get 0xFFFF when reading xdata memory.
I dont see any SFR for memory control that would limit this access.

Do I need to set the xdata memory range through the GUI or in Startup.a51 or both?

Is there some other tool setting that I'm missing?

Any help would be appreciated...
==============
#define XDATA xdata
// #include <REG1200.H>
sfr TCON = 0x88;
sfr CKCON = 0x8E;
sfr MWS = 0x8F;

#include <stdio.h>

extern void autobaud(void);

#define ARRAY_SIZE 10

void main(void)
{
unsigned int idata i;
int XDATA dd[ARRAY_SIZE];

CKCON = 0x10;
TCON = 0;
autobaud();

for (i=0; i < ARRAY_SIZE; i++) dd[i] = i;
printf("dd[8] = %x\n", dd[8]); /* = 0xFFFF = wrong! */

}

Parents
  • It appears that the MSC1200Yx family is not capable of supporting any xdata memory, so there is no SFR register associated with it.

    not a foregone conclusion. I do not remember which, but I got cought on that one once. Another "famiuly member" was external RAM capable, so even the members not so needed the bit set.

    anyhow, you are totally wrong. From the datsheet:

    • Memory Write Pulse (WR) which is idle high. Whenever a external memory write command (MOVX) is executed then a pulse is seen on P3.6. This method can be used only if CPOL is set to '1'.

    Erik

    I',m sorry, you sucked me into spending time on the datsheet of a device I do not know.

Reply
  • It appears that the MSC1200Yx family is not capable of supporting any xdata memory, so there is no SFR register associated with it.

    not a foregone conclusion. I do not remember which, but I got cought on that one once. Another "famiuly member" was external RAM capable, so even the members not so needed the bit set.

    anyhow, you are totally wrong. From the datsheet:

    • Memory Write Pulse (WR) which is idle high. Whenever a external memory write command (MOVX) is executed then a pulse is seen on P3.6. This method can be used only if CPOL is set to '1'.

    Erik

    I',m sorry, you sucked me into spending time on the datsheet of a device I do not know.

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