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Hi, give me somebody an explanation? I simulate DS89c420 device on XTAL Freq 27MHz. After reset CPU clock is 6.75MHz and single cycle instuction's time is 148ns. I supposed 1 internal clock per 1 xtal clock. Thank you Petr
Dallas 8051 parts typically require 4 clocks to execute an instruction. 27 MHz / 4 = 6.75 MHz = 148 ns. The classic 8051 architecture requires 12 clocks per instruction. Other variants I've seen operate at 2 or 6 clocks per instruction. So, the only way to be sure is simply to check the data sheet for your particular part. Also, with parts with less than 12 clocks per instruction, keep an eye out for extra configuration bits that control the input to the timers, baud rate generators, and such periperhals. They'll often have a 12-clock-per compatibility mode switch for replacing older parts.
You need to read the "Ultra-High-Speed Flash Microcontroller User's Guide" http://pdfserv.maxim-ic.com/arpdf/Design/89c420_userguide.pdf Page 40 discusses instruction timing. Table 5-1 on p50 compares the instruction timings against a "standard" 8051. Section 14 gives full instruction set details, including timings.
I think I know timing of DS89c420. Default condition is one external oscillator clock per system slock and in case of internal program code memory cycle is SYSCLK/1. But when I tried to simulate this chip, timing seems to be more like High Speed Microcontroler (for example DS87c520), not like Ultra HSM. So I think this part is not fully simulated today.
You're right - UV2 currently does not simulate DS89C420 core - default Dallas high-speed core is used instead. Also, be carefull with DPTR auto increment/decrement and swap, as this also works as on DS80C320... regards Dejan