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DSEG AT Directive Problem

I am having some difficulty with using the Keil A51 assembler. My 8051 derivative processor has 256 bytes of internal RAM. I have my code organized with a...

BSEG AT 0
BIT1 DBIT 1
BIT2 DBIT 1
BIT3 DBIT 1
  ...
  ...
BIT8 DBIT 1

Following this I have the data segment setup as starting at 0x21 because I know that the BSEG will be but one byte ending up at 0x20.

DSEG AT 021H
VAR1:
   DS   1
VAR2:
   DS   1
  ...
  ...
VARn:
   DS   1
;
BUF1:
   DS   32
BUF2:
   DS   26
BUF4:
   DS   16
BUF5:
   DS   16
STACK:
   DS   16
_RAM_TOP:
   DS   0

Now the problem is that the DSEG is growing beyond 0x7F (past end of 128 bytes) and the assembler is complaining about that. How can I get the assembler to quit complaining. All should be OK becasue in my code all of the various buffers are accessed indirectly by the type of code:

   MOV   R0, #BUF3
   MOV   @R0, A

I realize I could hard code a separate PSEG at 0x80, but then there ends up being a hole in the allocated memory and I wanted to avoid that to get the maximum utilization of my 256 bytes of RAM.

Any ideas ????

Michael Karas

<pre

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0 Michael Karas over 21 years ago

I solved my problem. I guess the biggest difficulty came from trying to use the type of absolute segment declaration I was using. I went to relocatable segments as shown below and let the linker decide where to put things. Now all is better!!

BITS_SEG    SEGMENT     BIT
DATA_SEG    SEGMENT     DATA
BUFF_SEG    SEGMENT     IDATA
CODE_SEG    SEGMENT     CODE

     RSEG    BITS_SEG
BIT1:
     DBIT 1
BIT2:
     DBIT 1
BIT3:
     DBIT 1
      ...
      ...
BITn:
    DBIT 1
;
    RSEG    DATA_SEG
VAR1:
    DS   1
VAR2:
    DS   1
     ...
     ...
VARn:
    DS   1
;
    RSEG    BUFF_SEG
BUF1:
    DS   32
BUF2:
    DS   26
BUF3:
    DS   16
     ...
     ...
BUFn:
    DS   16
STACK:
    DS   16

Thanks
Michael Karas

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0 Michael Karas over 21 years ago

BITS_SEG    SEGMENT     BIT
DATA_SEG    SEGMENT     DATA
BUFF_SEG    SEGMENT     IDATA
CODE_SEG    SEGMENT     CODE

     RSEG    BITS_SEG
BIT1:
     DBIT 1
BIT2:
     DBIT 1
BIT3:
     DBIT 1
      ...
      ...
BITn:
    DBIT 1
;
    RSEG    DATA_SEG
VAR1:
    DS   1
VAR2:
    DS   1
     ...
     ...
VARn:
    DS   1
;
    RSEG    BUFF_SEG
BUF1:
    DS   32
BUF2:
    DS   26
BUF3:
    DS   16
     ...
     ...
BUFn:
    DS   16
STACK:
    DS   16

Thanks
Michael Karas

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