When using PDATA, the memory viewer, watchpoint tabs, and command window contain zeros for the PDATA I'm using. When I step through the disassembled output, the Register window in the Project Workspace gets the correct non-zero values. The PDATA symbol (32 byte array) in question is getting placed at 0x40. I look up this symbol in the memory window by doing a x:symbol_name, symbol_name, or x:0x40. In the command window, I do a "d symbol_name". Any ideas?
Is the behaviour of MOVX @Ri specified for the ADuC83x devices? Where is it documented? On standard 8051 the P2 value is used to provide the high byte for MOVX @Ri. In case that the ADuC83x always uses 0 as high-byte you need to initialize the PPAGE VTREG in teh simulator to 0.
Is what behavior specifed? I've been referencing old atmel/intel 8051 manuals. Is there a way to have the VTREG PPAGE default to 0x00? I thought the startup file set the default. This statement
PPAGE=0xFFFFFFF // Use default behavior for MOVX @Rx
Okay it assumes your using external XRAM.
Is what behavior specifed? I've been referencing old atmel/intel 8051 manuals. That's not good. If you're using an Analog Devices part, you should start looking at the manual for that device. PDATA is accessed using MOVX A,@R0/R1 and MOVX @R0/R1, A. R0/R1 contains the lower 8-bits of the XDATA address. The upper 8-bits have to come from somewhere else. On older devices, this was always Port 2. However, newer devices have on-chip XDATA which frees up Port 2 for general I/O. So, P2 is not used (on some devices with on-chip XDATA) for the upper address byte. The following knoweldgebase article provides more info on that. http://www.keil.com/support/docs/1848.htm This statement ... PPAGE=0xFFFFFFF // Use default behavior for MOVX @Rx ... confuses me. This statement tells the simulator that PDATA is accessed using P2 as the upper address byte and R0/R1 as the lower address byte. It's important to set this correctly because your device may not actually work that way. Jon Jon
We tried to find out the behaviour of MOVX @Ri on Analog Devices parts with on-chip XRAM, but we had no luck. We will contact them again.
Is there anyway to set the PPAGE VTREG to default to the base of XRAM? From support doc 1848.htm
Most devices allow PDATA access (MOVX @Rx) to only the first 256 bytes of XDATA (0x0000- 0x00FF). On such devices, there is nothing to configure. You don't need to enable the PPAGEENABLE setting in the startup code since the PPAGE is fixed by the chip to 0.
As shown in Figure 38, the output drivers of Ports 2 are switchable to an internal ADDR and ADDR/DATA bus by an internal CONTROL signal for use in external memory accesses (as for Port 0). In external memory addressing mode (CONTROL = 1) the port pins feature push-pull operation controlled by the internal address bus (ADDR line). However, unlike the P0 SFR during external memory accesses, the P2 SFR remains unchanged.
Is there anyway to set the PPAGE VTREG to default to the base of XRAM? Yep. I meant to include the following link earlier: http://www.keil.com/support/docs/2394.htm Jon
We have got a clearification from Analog Devices: All ADuC83x and ADuC84x parts operate in the same manner as Philips parts. When on-chip XRAM is enabled the MOVX @Ri always address the first 256 bytes of XDATA space. For correct simulation of that behaviour you need to set the uVision Debugger VTREG PPAGE to 0 (as described in http://www.keil.com/support/docs/2394.htm)