251-architecture

Anybody familiar with the 251-architecture?

I'm using an INTEL 80c251 running in "PAGE MODE".
Page mode is used to speed-up the code fetching
from external memory, and have an effect on the
ALE-signal operation wich controls the multiplex-
function(74573) of the external data/address bus.
I waste no more time to explain the details of
this mode because if there is any interest in
the subject one probably already know the details,
but if not it can be found in the 80c251 user's
manual and in INTEL's appnot AP-710.

In my 8051-constructions I use the ALE-signal to
kick on a peripheral watchdog(MAX1232) when I
don't want to do it from the program via a port-
pin.(Normaly this rarely happends, yet a hardware
strappingchoice exist).
Here is the ALE-signal always generated and the
watchdog will never activate the reset(in normal
conditions).

If I use a 80c251 in the same manner, but with the
page mode design I see a theoretical risk that the
watchdog(MAX1232) timer will run out and reset the
device(80c251). If the code fetching stays in the
same page(256 bytes) the ALE-signal is not generated.
And if it stays there long time enough the reset
will therefore be activated. Even if I think the
chance is small, I don't think the design with ALE-
signal and watchdog(MAX1232) is 100% waterproof in
this case.


If anyone has any knowledge,experience or has
come to the same conclusion as I in this
problem I would appreciate an answer.