external memory

If you connect 8M bytes to each chip select, you will not be able to configure the control registers of the external bus controller to access all of the 32M bytes of the memory. See the C167 or ST10 manual, section The External Bus Interface / Controlling The External Bus Controller / Definition of Address Areas:

The four register pairs BUSCON4/ADDRSEL4 & BUSCON1/ADDRSEL1 allow to define 4 separate address areas within the address space of the C167CR. Within each of these address areas external accesses can be controlled by one of the four different bus modes, independent of each other and of the bus mode specified in register BUSCON0. Each ADDRSELx register in a way cuts out an address window, within which the parameters in register BUSCONx are used to control external accesses.

Emphasis mine. So that's how it works. Read the manual, it's all there.

- mike

If you connect 8M bytes to each chip select, you will not be able to configure the control registers of the external bus controller to access all of the 32M bytes of the memory. See the C167 or ST10 manual, section The External Bus Interface / Controlling The External Bus Controller / Definition of Address Areas:

The four register pairs BUSCON4/ADDRSEL4 & BUSCON1/ADDRSEL1 allow to define 4 separate address areas within the address space of the C167CR. Within each of these address areas external accesses can be controlled by one of the four different bus modes, independent of each other and of the bus mode specified in register BUSCON0. Each ADDRSELx register in a way cuts out an address window, within which the parameters in register BUSCONx are used to control external accesses.

Emphasis mine. So that's how it works. Read the manual, it's all there.

- mike

Thanks for all mike

Last question :
if i declare 16Mo (the max) external ram and i 've 32Mo to use. Can i switch a 16Mo page with a simple bit use like chip select between 2 page of 16Mo (for example P3^5). Like this i can store more than 16Mo and the ST10 doens't see that.

Thanks again !!

what are you making?
The most code memory I have ever needed was 64k and the most data memory I have ever need has been 2M

Erik

Hi erik,
i must load in ram more than 16Mo of stimuli via a PC ; in order to be transfered in continuous (and high frequency) by a xilinx to 20 chips.
So, i need a lot of ram because the ST10 can't receive and transmit more 16Mo in continuous.
Now i hope you understand my problem
If you have some suggestions !!!

Thanks
Regards,
Jim

Can i switch a 16Mo page with a simple bit use like chip select between 2 page of 16Mo (for example P3^5)

Exactly. This is the so called bank switching. Remember that not exactly 16M bytes are accessisble via the external bus: 4K bytes are mapped to on-chip RAM and SFRs and 8K bytes are mapped to XRAM and CAN registers. So it's more like 16M-12K bytes, or even less with on-chip ROM (256K bytes) enabled. If you don't want to waste a byte, you could have 4 banks 8M bytes each.

- mike

Hi,
I would to know if the capacity of external memory is 16M*8bits, 16Mo*16bits or the twice are good .
Thanks
Regards,
Jim

Not sure what you mean there, but I'll try to answer anyway. The size of the address space is 16M bytes. That means that you can't address more than that directly (without bank switching). You can address slightly less than 16M bytes via the external bus. You can address more with bank switching, as discussed earlier.
16M x 8 bits is 16M bytes. 16M x 16 bits is 32M bytes.

- mike

Thanks