To your experience, which 8051 in circuit emulator is giving faithful result, yet low cost (<$10K)? I am using Philips 8xC58 family microcontrollers. Thanks.
The first consideration should be: do you want a bondout emulator (e.g. Philips, Nohau) or a non-bondout emulator such as CEIBO. A bondout emulator allow a few more things than a non-bondout and usually is a bit faster in the response to the keyboard (same response to a breakpoint). The more expensive bondout ICEs has some very nice trace features. Also a bondout typically does not interfere with your code space and stack. A non-bondout emulator require that you leave a bit of code memory (typ about 1k) free and will grab 2-5 stack positions. A non-bondout will not have very advanced trace if any. This makes the bondout the ICE of choice except for one thing: With a bondout you need to buy a 'pod' ($200- $2000) for every derivative you want to emulate with a non-bondout, you just pop the other derivative in (chip cost $2-$20). Erik
Over the past few years, fewer and fewer chip vendors make bondouts. There are several reaons for this: 1. The bondout is a different device than the chip you will use in production. So, there can be bondout chip bugs that do not appear in the actual device and vice-versa. 2. Bondout devices are expensive to make and only a few are manufactured (the only customer is an emulator company). 3. It is difficult to keep the bondout synchronized with the latest chip release. 4. If a chip bug is discovered and corrected, the bondouts (that are already in the field) should be updated. This is difficult to do. More and more chip vendors are moving to a JTAG or other on-chip debugging system that is built into every chip manufactured. There are numerous advantages to this technology and it gets closer to the capabilities of a bondout each year. Jon
More and more chip vendors are moving to a JTAG or other on-chip debugging system that is built into every chip manufactured. There are numerous advantages to this technology and it gets closer to the capabilities of a bondout each year. Unfortunately, the on-chip debugging is not (yet?) included in the 'production priced' derivatives. If Thomas plans just to make a few units, it will be much cheaper to use a very high priced chip such as Cygnal with JTAG debug than buying an ICE. If, however he plans production the non recurring cost of an ICE is well worth it. Erik
Unfortunately, the on-chip debugging is not (yet?) included in the 'production priced' derivatives. But just wait. It'll get there. On most new derivatives, the JTAG/on-chip debugging solution is not the expensive part. Currently all Cygnal, ST uPSD, and Triscend devices have on-chip debug. Granted, most of these devices are expensive--but they also have a lot of features not found in a standard 8051. I think it's safe to say we're going to see the JTAG/on-chip debug capabilities coming from the "new" chip vendors first. Most of these guys synthesize the core and either license or create their own on-chip debug VHDL code. Older chip vendors will probably begin phasing-in JTAG in the next few years. Remember, only 4 years ago, there was only one 8051 device with on-chip debugging. Now there are over 50 from at least four vendors. Jon
Higher-end processors have already gone the JTAG (etc) route, if for no other reason that you can't make a bond-out ICE for high speed, complicated processors for any reasonable cost. If the trend for such cores as ARM and PPC hold true, then the JTAG debuggers are going to be more limited than the old-school ICEs. In particular, I don't see very many hardware vendors that actually support trace and timing functions in the chips, even when the available debugger software has those features. Usually, they give you two (or one!) hardware breakpoints and leave it at that. The trace modules are an available option that the actual chip designers seem never to actually put in the chip, available in theory but not in practice. Since the on-chip debugging moves the debug hardware from the ICE to, well, on-chip, it adds to the cost of every chip. The extra gates for fancy internal trace functions are going to hurt a lot more on an 8051 die than on say, an ARM9. It'd be a much higher percentage of your total gate count, and affect your final per-unit price that much more. So, I'd expect there to be even more pressure to leave extra on-chip features out of small micros. So, I think it unlikely that you'll have extensive debug capabilities on the same part you actually use for production, if you have them at all. Manufacturers may decide to develop special debug parts that have more on chip support, and sell them at a higher price, just for development. (This path of course has many of the same drawbacks mentioned for the special bond-out part for an ICE.) But I don't see that going on in the ARM or PPC marketplace, so I don't really expect it in the 8051 marketplace. I'm afraid I'll just have to say goodbye to the ICE, replacing those functions with intrusive (and result-affecting) software instrumentation and somewhat more awkward logic analyzer tracing (for those designs that aren't so highly integrated that you can still see the bus signals). And if you think an ICE is expensive, look at the price on a good logic analyzer...
I'm afraid I'll just have to say goodbye to the ICE Why, Drew ? Erik
Why? Well, the reasons I was outlining above. JTAG emulators have a lot of good things going for them. And if the chip makers go that route, and thus aren't making emulator parts, the ICEs will disappear.
The JTAG is an added expense to the chip and we (some of us) are in very cost conscious fields where $0.50 per chip is real money. So far, I have only seen JTAG on the very expensive derivatives (Cygnal) and I doubt it will be seen soon on the $0.58 chips. Erik
An low-cost alternative for standard 40-pin DIP and 44-pin PLCC 8051 devices is the SoftICE from SST that connects directly to the µVision2 Debugger. See: http://www.keil.com/pr/sst_020315.htm