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Using P0 and P2 as I/O

I'm using uVision 2 and a Hitex Mx51 emulator to drive 32 I/O pins on a 87C51RA+ processor. However, P0 and P2 seem to remain to be on addressing (continuous data on some of the pins). I can't disable ALE by setting AUXR to 0x03. Is there any more registers that I need to set-up? Or is there a setting in Hitop (Hitex) that overrides the external addressing that I need to disable?

  • I don't know this processor, but since the number starts with 87 I think it has internal ROM. Therefore, you should be able to use the pins of P0 and P2 as I/O pins, unless your program is bigger than the amount of internal rom.
    To get the I/O functionality of the ports P0 and P2, there should be a pin called EA. If this pin is put to ground, then the device will access its data from external rom. When this pin is put to Vcc, then the device will fetch its data from internal rom, except -as already mentioned- the size of the code is larger than the size of the internal ROM.
    If the latter is the case, then the device is obliged to use P0 and P2 to get its data from external memory.

    Rgds,