Observing action single stepping through below code segment reveals that DJNZ instruction in div_loop doesn't decrement R6. On first loop execution it adds 16. The next loop through decrements. Susequent loopings causes it to have an add other times a decrement. Running version 2.30 of uVision. Code div_OK: MOV R1,xh MOV R0,xl MOV R2,#00 MOV R3,#00 mov xh,#00 mov xl,#00 MOV R6,#16 div_loop: clr c mov a,R0 rlc a mov R0,a mov a,R1 rlc a mov a,xl rlc a mov xl,a mov a,xh rlc a mov xh,a lcall sub16 mov c,ov cpl c jnc div_1 mov xh,zh mov xl,zl div_1: mov a,r2 rlc a mov r2,a mov a,r3 rlc a mov r3,a djnz R6,div_loop mov z3,r3 mov z2,r2 mov z1,xh mov z0,xl mov r4,xh mov r5,xl clr OV ret sub16: mov a,xl clr c subb a,yl mov zl,a mov a,xh subb a,yh mov zh,a mov ov,c ret
Are you sure you're looking in the right register bank? I don't know it it's still the case (haven't had cause to check), but the uVision2 simulator only ever used to display RB0 - irrespective of the bank selection in the PSW!
I don't know it it's still the case (haven't had cause to check), but the uVision2 simulator only ever used to display RB0... I've also never seen that problem before. Regardless, uVision2 displays the values of the registers for the register bank selected in the PSW. Jon
I recall the register bank problem reported by Andrew. It was real, but does not occur in the most recent versions of uVision.
I recall the register bank problem reported by Andrew. It was real, but does not occur in the most recent versions of uVision. OK. Maybe it was a "feature" that was only available in one release. Jon