• State Not Answered
  • Locked Locked
  • Replies 3 replies
  • Subscribers 21 subscribers
  • Views 1184 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Accessing

Andrew Neil

Cross-posting from http://www.8052.com/forum/read.phtml?id=27259&top=27260

A while back, Jon Ward wrote:

"You COULD do this [access a 'C' array in an I2C device] with the Keil tools specifying the I2C EEPROM as RAM in the far memory area. The PK51 kit allows you to create your own assembler code that reads and writes bytes in "special" memory areas. You can declare variables as far and access this memory from C.
"Note that this was originally called XDATA banking, but, in fact, you can use this technique to access any memory type."

http://www.8052.com/forum/read.phtml?id=24473

My question is: can you implement multiple different sorts of far memory in the same system?
eg, could I both use far as above to access 'C' variables in an I2C device and also to provide "conventional" banked access to >64K of parallel SRAM?

Parents
  • 0

    My question is: can you implement multiple different sorts of far memory in the same system?
    eg, could I both use far as above to access 'C' variables in an I2C device and also to provide "conventional" banked access to >64K of parallel SRAM?

    Yes. Think of it this way...the C51 compiler supports a virtual 24-bit address space that is broken down into RAM (000000-7FFFFF) and ROM (800000-FFFFFF).

    A typical 8051 maps into this virtual space as follows:

    000000-00007F DATA/IDATA
000080-0000FF IDATA
000100-00FFFF unavailable
010000-01FFFF XDATA
020000-7FFFFF unused
800000-FDFFFF unused
FE0000-FE00FF PDATA
FE0100-FEFFFF unavailable
FF0000-FFFFFF CODE

    As you can see, most of the 24-bit address space is unused.

    The XBANKING.A51 file provides a mechanism whereby you can specify how to read and write anywhere from 020000-7FFFFF and 800000-FDFFFF. You can modify these routines to: access I2C RAM when the segment is 7F and access a 256K SRAM for segment 02-05.

    The memory map would appear as follows:

    000000-00007F DATA/IDATA
000080-0000FF IDATA
000100-00FFFF unavailable
010000-01FFFF XDATA
020000-05FFFF SRAM
060000-7EFFFF unused
7F0000-7FFFFF I2C RAM
800000-FDFFFF unused
FE0000-FE00FF PDATA
FE0100-FEFFFF unavailable
FF0000-FFFFFF CODE

    When you declare variables that you want to reside in the I2C, you must use the USERCLASS directive to put them in a unique class. You can then use the LX51 linker class directive to locate the class at a specific address range. For example, I would declare my I2C variables in the I2C_RAM class and tell the linker that the I2C_RAM class is located from 0x7F0000-0x7FFFFF.

    Take a look at the XBANKING.A51 file and this will start to make more sense.

    Jon

Reply
  • 0

    My question is: can you implement multiple different sorts of far memory in the same system?
    eg, could I both use far as above to access 'C' variables in an I2C device and also to provide "conventional" banked access to >64K of parallel SRAM?

    Yes. Think of it this way...the C51 compiler supports a virtual 24-bit address space that is broken down into RAM (000000-7FFFFF) and ROM (800000-FFFFFF).

    A typical 8051 maps into this virtual space as follows:

    000000-00007F DATA/IDATA
000080-0000FF IDATA
000100-00FFFF unavailable
010000-01FFFF XDATA
020000-7FFFFF unused
800000-FDFFFF unused
FE0000-FE00FF PDATA
FE0100-FEFFFF unavailable
FF0000-FFFFFF CODE

    As you can see, most of the 24-bit address space is unused.

    The XBANKING.A51 file provides a mechanism whereby you can specify how to read and write anywhere from 020000-7FFFFF and 800000-FDFFFF. You can modify these routines to: access I2C RAM when the segment is 7F and access a 256K SRAM for segment 02-05.

    The memory map would appear as follows:

    000000-00007F DATA/IDATA
000080-0000FF IDATA
000100-00FFFF unavailable
010000-01FFFF XDATA
020000-05FFFF SRAM
060000-7EFFFF unused
7F0000-7FFFFF I2C RAM
800000-FDFFFF unused
FE0000-FE00FF PDATA
FE0100-FEFFFF unavailable
FF0000-FFFFFF CODE

    When you declare variables that you want to reside in the I2C, you must use the USERCLASS directive to put them in a unique class. You can then use the LX51 linker class directive to locate the class at a specific address range. For example, I would declare my I2C variables in the I2C_RAM class and tell the linker that the I2C_RAM class is located from 0x7F0000-0x7FFFFF.

    Take a look at the XBANKING.A51 file and this will start to make more sense.

    Jon

Children
No data