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C251 v3.12 The C251 compiler does not handle arithmetic for array indices consistently. Consider
char tt[30] ; char test ; unsigned char aaa = 27 ; unsigned int bbb = 27 ; test = tt[aaa - 20] ; test = tt[bbb - 20] ;
Thanks for discussion. I'll take another look at what happened in the first place. By the way, I've been checking if other old bugs were fixed in C251 v3.20b. 1. The need to explicitly use using 0 in main() is gone. 2. An old bug in v2 I posted over a year ago (before you remodeled your discussion forum) about using sbit and _at_ together is fixed. Since I had a work-around, I never checked back on it until now. Thanks. Joel
1. The need to explicitly use using 0 in main() is gone. I've never heard of this problem. Register bank 0 is selected by default. Why did you need to specify it in your application? Jon
I finally had some time to look at the array indexing problem. There are a lot details that may or not be relevant. My program ROM and hardware memory map reside in 0xFF space. My system RAM is in 0x00 space.
typedef unsigned char BYTE ; typedef unsigned int WORD ; typedef struct { BYTE dac; BYTE x1; BYTE roll; BYTE x2; } ASIC_AGS ; enum { DCA_LEL_WRDAC=1, DCA_LEH_WRDAC, DET_BIAS_WRDAC, AGS_DAC_1_WRDAC=24, AGS_ECHO_WRDAC=40, LASER_WRDAC, END_LIST_WRDAC } ; export volatile ASIC_AGS far asic_ags[16] _at_ 0xFFFFA0 ; void local_func(WORD dacID, WORD dacVal) { BYTE ch ; BYTE far * tempointer1 ; BYTE far * tempointer2 ; if((dacID<AGS_DAC_1_WRDAC)||(dacID>AGS_ECHO_WRDAC)) { /* Do something else */ } /* case 1 */ asic_ags[dacID - AGS_DAC_1_WRDAC] = (BYTE)dacVal ; tempointer1 = (BYTE far *)(&asic_ags[dacID - AGS_DAC_1_WRDAC].dac) ; /* case 2 */ ch = dacID - AGS_DAC_1_WRDAC ; asic_ags[ch] = (BYTE)dacVal ; tempointer2 = (BYTE far *)(&asic_ags[ch].dac) ; /* print to system debug port */ sprintf(msg,"t1 = %lX, t2 = %lX", tempointer1, tempointer2); debug_msg(msg); }
; case 1 mov wr6,wr14 sll wr6 sll wr6 mov wr14,#WORD0 asic_ags+65440 mov wr12 #WORD2 asic_ags+65440 add wr14,wr6 ;--- 'tempointer1' assigned to Reg DR12 --- ; case 2 mov r10,ch mov a,#4 mul ab mov wr2,#WORD0 asic_ags mov wr0,#WORD2 asic_ags add wr2,wr10 mov tempointer2,dr0