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Does using the SRC directive reduce optimization?

I recall that with some of the many compilers I use, use of in-line assembly interferes with the compiler's optimizer because a compiler may not look at the assembly code to know what registers have/haven't been modified, and thus generates code assuming the worst, that registers have been modified, and generates inefficent code accordingly.

I don't recall if this is the case with Keil C. I'd appreciate it if someone could elaborate on C51's performance in this area, otherwise I'll have to generate test cases.

Thanks,

--Dan Henry

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  • Thanks, Jon. You saved me a bunch of test case time.

    This is not too much of a problem for me. C51 generates great code and in the past, whenever I've needed to do better, I just do it in a separate assembler module.

    The Salvo port I mentioned in another thread uses some in-line assembly to accomodate the stackless PIC MCU, but I think I'll be able to implement equivalent functionality in C51, since I can manipulate the stack pointer on 8051 derivatives directly in C.

    --Dan Henry

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  • Thanks, Jon. You saved me a bunch of test case time.

    This is not too much of a problem for me. C51 generates great code and in the past, whenever I've needed to do better, I just do it in a separate assembler module.

    The Salvo port I mentioned in another thread uses some in-line assembly to accomodate the stackless PIC MCU, but I think I'll be able to implement equivalent functionality in C51, since I can manipulate the stack pointer on 8051 derivatives directly in C.

    --Dan Henry

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