We are using the processor's internal ROM (EA=1) and the first 256 bytes of internal RAM. Looking at the AUXR (8E) register, the default should be to use external RAM for xdata variables i.e. loaded with 0x0B at startup - so we discarded this possiblity. The address lines are held low and no addressing occurs at all. The processor starts up, because ports 1 and 3 are responding, but fails to do any external RAM fetches. Any ideas???
Are you sure that your target hardware is working properly? I mean, if you address different adresses in xdata segment from an assembler program, you should see the portpins doing something. And you can also use the address and data lines as I/O ports... try that out... I don't know your particular processor, but the I/O ports (Adr.- and Data bus included) have pretty weak pullups. So if your RAM's outputs are enabled, that might override your port pins. So, if you cannot change the Data and address lines with manipulating the ports, then check your hardware. Take care Sven