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I'm using an ASIC that pages into its RAM/ROM. So it has 16k blocks that are paged using registers, PAGEA,PAGEB,PAGEC. It has 128k of code and ram space. How do i setup the compiler to access the ram correctly? I know under options i can set the size of the ram but it wouldn't know about the page registers. Do i have to declare variables in certain pages myself or will the compiler know when to put the variable into a different page? Will it know to toggle the page registers to access the data? David
I don't think your new 24 bit pointer would help him. As you can see in my example abouve, the 16 bit part of the address is not only an offset, but the high order 2 bits are the page register select bits. These bits must be non-zero. In otherwords, my guess is that your new 24 bit pointers support page selection, not page register selection. Am I wrong?
The new 24 bit addressing is translated into WHATEVER WEIRD memory architecture you have by...YOU. You modify the source of the XBANKING file to dictate just what exactly the 24-bit address is. If you munge it down into a 14-bit offset with a 2-bit selector that's just fine and will work AOK with the compiler. From the program's perspective, it appears that you have 24-bit addresses. Jon
You're right. The compiler emits calls to your user defined functions to to load and store data. If you can tolerate the speed hit, this is a simple way to go. I erroneously assumed, that for the sake of speed, that loads and store would be split into a "8 bit page changing macro" and "16 bit dptr accesses".
BYTE far Var1[ 0x1FFE ]; BYTE far Var2[100]; Var1[20] = Var2[5]; 0008 7B00 R MOV R3,#MBYTE Var2 000A 7A00 R MOV R2,#HIGH Var2+05H 000C 7900 R MOV R1,#LOW Var2+05H 000E 120000 E LCALL ?C?CLDPTR 0011 7B00 R MOV R3,#MBYTE Var1 0013 7A00 R MOV R2,#HIGH Var1+014H 0015 7900 R MOV R1,#LOW Var1+014H 0017 020000 E LJMP ?C?CSTPTR