setting up paging options

That may be true, not 100% sure as the datasheet is VERY light on.
The Page bytes are SFR's and maybe they can be set so we can customize the device.

Whether the hardware will generate the correct addressing it doesn't really say, i'm trying to get more info out of them.

So you are syaing that the compiler can treat it as a flat memory model up to the full space and the hardware will generate the correct address? ie set the page registers itself? I thought the compiler would have to tell it somehow?

David

There are a couple of approaches to extending 16 bit memory space.

One approach is to create N * 32KB pages. Page selection is done by extra address pins via some register. To use this approach you need to "set the extra address, do the access". This allows access to only one large page without changing the page address.

Another approach is to map certain small pages (size < 32K) into your 16 bit memory space. Page selection is usually done by using some of the high order bits of the 16 bit address. This allows access to multiple small pages without changing the page registers.

(Another pageing scheme common in 805x micros, is to have a MPAGE sfr that maps one 256 byte page of memory into the external 16 bit memory space so you can do pdata access for your exrernal data.)

Since your page sizes were less than 32kB and since you had 3 "PAGE" registers, I guess that your ASIC used the 2nd method. Of course I could be wrong. You need the documentation. If you can post what documentation you have, I could take another guess.

To answer your question, since Kiel has only 16 bit pointers, there is no support for automatic external data space paging. Keil does have great support for code space paging.

The easiest thing would be just to give you the datasheet, however there web site doesn't contain the full sheet yet.

It has paging to extend the pdata as well.

The company is Winedge Electronics.
If we could attach files here i would.

David

I look at that chip too (lots of ram), however I could not get the needed techical information. My handle is JYoung and I work at Martinsound. I'll let you figure out my EMail address. I would be glad to look at it for you.

// Example of using page registers with 16 bit Keil addressing

typedef unsigned char BYTE;

enum { ptROM, ptRAM, ptIO };

sfr PageType = 0x9A;

#define PAGETYPEFOR4000(pt) ( PageType = ( PageType & ~0x03 ) |   (pt) )
#define PAGETYPEFOR8000(pt) ( PageType = ( PageType & ~0x0C ) | ( (pt) << 2 ) )
#define PAGETYPEFORC000(pt) ( PageType = ( PageType & ~0x30 ) | ( (pt) << 4 ) )
 
sfr PageFor4000 = 0x9B;
sfr PageFor8000 = 0x9C;
sfr PageForC000 = 0x9D;

#define PAGESZ 0x8000

#define PAGE(PhysicalAddr)   ( (unsigned int)(PhysicalAddr) >> 14 )
#define OFFSET(PhysicalAddr) ( (unsigned int)(PhysicalAddr) & (PAGESZ-1) ) 

//ROM   00_0000 to 01_FFFF
//RAM   00_0000 to 01_FFFF
//CGROM 20_0000 to 23_FFFF

//Define type and physical_address for objects
typedef BYTE typVar1[ 0x1000 ];
#define phyVar1  0x11020   //check PAGE( &phyVar1[0] ) = PAGE( &phyVar1[ 0x0fff] )

typedef BYTE typVar2;
#define phyVar2  0x05023

void main( void )
{
   PAGETYPEFOR4000( ptRAM ); 
   PageFor4000 = PAGE( phyVar1 );
   #define pVar1 ( (typVar1 xdata*)( OFFSET(phyVar1) || 0x4000) )

   PAGETYPEFORC000( ptRAM ); 
   PageForC000 = PAGE( phyVar2 );
   #define pVar2 ( (typVar2 xdata*)( OFFSET(phyVar2) || 0xC000) )

   (*pVar1)[20] = *pVar2;
}

So i in terms of the options of the compiler i still put in off chip xdata memory:

0000 to 0xffff for my 64k page and then mod these routines using far to gain the correct access.

thanks guys for the great help.
David

Yes.

There is also page switching for the plain data access ram also. But since they swap out the entire 256 bytes of ram, I think there are too many gotcha's to use it.

If you have anymore questions, post to a new thread, since the e-mail notification is not work for me on this thread.