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PDATA with Triscend E5 CSoC Devices

Andrew Neil

Triscend's App Note AN07, "Using Keil Development Tools with Triscend FastChip and the E5 CSoC Family," warns against using PDATA; it says that it's "awkward" but doesn't explain exactly what this means.

Does anyone have any experience (good or bad) in using PDATA on a Triscend E5?

The App Note is at:
http://www.triscend.com/products/documentation/an07.pdf

  • 0

    There is no real "problem" with PDATA, but its explanation is kinda strange.

    PDATA is defined as 1 page (256) bytes of XDATA. It is accessed with the MOVX @R0 and MOVX @R1 instructions.

    PDATA is a page of XDATA whose upper address byte is a constant value written into P2 and whose lower address byte is specified by R0 or R1.

    Anyway, if you use PDATA, you must also have XDATA (and usually more than 256 bytes of it). Therefore, you must ensure that the PDATA space is not overwritten by XDATA variables.

    Did that clear things up? :-)

    Jon

  • 0 in reply to Keil Support

    Yes, I understand all that and it's just what my current Client is trying to do.
    It's working fine under the simulator (after ensuring that XDATA didn't overwrite PDATA - ahem!)

    But the Triscend App Note AN07 specifically says, on p14, "This memory type is not recommended on the Triscend E5." and again, on p15, "the compact model is awkward on the E5 CSoC."

    So why are Triscend so averse to PDATA?
    What exactly makes it so "awkward?"
    Is there some problem with the Triscend memory managers and/or mappers, or with the configuration of P2?
    What would be the impact of using it on an E5 CSoC?

  • 0 in reply to Andrew Neil

    I'm not sure exactly what the aversion is. But I agree that it is error-prone for most developers.

    Jon

  • 0 in reply to Keil Support

    Correspondence with Triscend seems to suggest that they don't quite understand PDATA; however the following seems significant: "The Triscend part ... has a 32 bit address space which all of the system peripherals and memory reside in. Port2 is actually available to you in the CSL without impacting on the amount of memory that is addressed. To be honest I'm not sure what will happen using the Compact memory model for data access"

    So, does anyone have any experience of what actually happens with PDATA on a Triscend E5 device?