I have an (external) 512 Kbyte flash using the Harvard model, and an Atmel 89C51 processor. I understand the code must move the boot loader code from flash to RAM for execution. (This assumption based on recent articles in Embedded Systems Programming and Circuit Cellar.) I assume this means a separate RAM chip must be installed in the program (ie, not data) space. Is this correct? Any references or articles on this topic with respect to 8051 family? Thanks.
The 8051 is a harvard architecture, this means the program address space overlaps the data address space but the two spaces are unique. You have code address starting from 0x000 - 0xFFFF and data address starting from 0x0000 - 0xFFFF. For code fetches, the CPU uses PSEN and ALE to fetch the next byte from FLASH or PROM. For data read/writes the CPU uses /RD or /WR with ALE to access your SRAM. You can execute out of RAM only if you override the CPU's architecture by allowing PSEN to enable RAM output drivers. I've never had to do this. Note if you do this you cut your address space in half, one shared block of 64K. 8051's execute in place, there is no copy-down to RAM like you have with traditional Von Neumann CPU's (MIPS, PowerPC, ARM). Just program your FLASH starting at 0x0000 with a jump to your first program instruction. - Mark