I use Xilinx Zynq xc7z010,it has a Cortex-A9 MPCore,its L2 Cache controller is L2Cpl310,
My Design is small do not need DDR, i hope run faster
i hope use its L2 Cache(512KB) as RAM
so i can added 512KB RAM to my chip,
i can write & read data to the 512KB memory
and write & read data to the 512 KB memory(L2 Cache) is very faster.
how can i do this?