Hi,
I need to know what happens in the v7 architecture (TI Cortex R4) when both a data abort and FIQ are due to occur.
I found the following document which attempts to address this question but seems to contradict itself:
"The Data Abort has a higher priority than FIQ so that if both occur simultaneously the Data Abort mode is entered first, before immediately processing the FIQ exception. When the FIQ handler returns, it will return to the Data abort vector to handle the data abort."
ARM Information Center
It all makes sense until I read the last sentence which appears to state exactly the opposite of the previous sentence. Can you clear this up for me?
Thanks,
Ryan
Message was edited by: Ryan Smoots Added test information
Hello,
I mean the stack pop or an interrupt return address might cause the data abort.
Best regards,
Yasuhiko Koumoto.