Hello,
I'm using the FVP Simulator with the Cortex R52 model. Is there any documentation specific to the Cortex R52?
I cannot find a suitable memory map in the fast_models_fvp_rg_100966_1100_00_en.pdf document.
Where is the GIC mapped?
Thank you in advance!
Regards,
Tibor
Hello Jason,
according to the R52 technical reference manual, the CPU Interface of the GIC is not memory mapped and can only be accessed with mcr or mrc instruction. The GIC distributor and redistributor are memory mapped.
The problem I have is, I cannot write in the specific register of the redistributor: GICR_ISENABLER0, although I can read or write to the other registers of the redistributor.
I need to write to this register in order to enable PPI IRQs from the ARM generic timer. At the moment, SPI IRQs are working fine, but I need to use PPI IRQs also.
Can you please check if you have any issues when writing to this register GICR_ISENABLER0? I tried writing with the Lauterbach debugger, pointer to memory or str instruction. The register should be located at 0xAF10 0100.
I figured it out, there was an additional offset required. Thank you for your support!