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Can I set NIC (registers) with secure privilege?

Shengye Wan

Hi experts,

I'm using a Juno r1 board which is deployed with a Yukon Ultra-2 Ethernet Controller. Now I'm working on a project which is trying to protect some registers of this NIC based on the TrustZone technology so the best solution for me is configuring these registers as secure-world access-only. My thought is setting the physical address of these registers as secure world address while I'm not sure if it's possible or not.

If this is not feasible, then I want to know can I configure the entire NIC with S/NS attributes dynamically during the runtime? For example, when the normal world switch to the secure world, EL3 configure the NIC as secure-world device and recover it as the NS device after the secure world execution.

Any suggestion or related document is appreciated! Thank you in advance.

Simon

Parents
  • 0 in reply to Mark Nicholson

    Hi Mark,

    Thank you for your kindly detailed explanation on the HDLCD controller.

    I think I understand how does the transaction generated from HDLCD controller is configured as S/NS transaction. However, I'm still confused about the following case:

    Assume I set the HDLCD controller as trusted on both SMMU and SEC_HDLCD register, and the controller can read the data from the secure memory. Now if a core with NS privilege generates a read transaction on the address area belong to this HDLCD controller via memory-mapped I/O, is this transaction blocked by some component?

    Thank you again for your help.

    Simon

Reply
  • 0 in reply to Mark Nicholson

    Hi Mark,

    Thank you for your kindly detailed explanation on the HDLCD controller.

    I think I understand how does the transaction generated from HDLCD controller is configured as S/NS transaction. However, I'm still confused about the following case:

    Assume I set the HDLCD controller as trusted on both SMMU and SEC_HDLCD register, and the controller can read the data from the secure memory. Now if a core with NS privilege generates a read transaction on the address area belong to this HDLCD controller via memory-mapped I/O, is this transaction blocked by some component?

    Thank you again for your help.

    Simon

Children
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