Hello,
My Environment:
I'm running the small RTOS on AArch32. The OS is using 1:1 MMU mapping, i.e, the virtual addresses are the same to physical addresses.
According to my understanding of context switch, RTOS does not need to care about Cache coherency during context switching if it does not use MMU.
In my condition, even though MMU is enabled, all processes are supposed to use unique virtual addressees. so I guess that during context switching, the OS does not need to call Cache flush functions, but I'm not %100 sure about this.
Your comments, suggestion would be greatly appreciated.
Hi,
It depends on exactly how your RTOS works and what your tasks do. But, caveats aside... generally you wouldn't need to perform maintenance in this environment.
FWIW...
Explicit cache maintenance on context switch isn't generally necessary even with the MMU enabled and changing VA/PA mappings between tasks. Generally the A-class implementations seek to minimise the need for explicit SW cache maintenance.
In something like Linux. Different tasks will use a common virtual address space, but be mapped to different physical addresses. The A53 data caches store Physically Tagged data allowing data from different tasks to be uniquely identified. The TLBs (a cache of translations) use an ASID (check the Architecture Reference Manual for details) set in software on task instantiation. This allows different VA/PA mappings associated with different tasks to be kept separated.
MarkN.
Thank Mark for the quick reply. This is very useful information: 10 out of 10!