Hi experts Ash WildingMark Nicholson Michele Wilkinson,
I configured my Juno board as this instruction and my workspace is initialized by the script from that page too.
Now I met some unknown issues when setting secure timer for my board. I find the ARM-TF provides a test secure payload and they utilize the secure timer so I want to try this payload to confirm my board's timer works well.
In this case, I'm wondering can I still use the workspace I got to build the TSP for Juno board?
If I can, could you please give me some hints about how to modify the build scripts? If I can't, is there any other instructions about applying the TSP on Juno?
Thank you in advance.
Simon
Hi Simon,
The problem you are experiencing is due to the recent changes to the way the deliverables communicate with the SCP - via SCMI rather than SCPI (see the Release Notes).
To fix this you need to build Trusted Firmware with the `CSS_USE_SCMI_SDS_DRIVER=1' flag set, i.e.:
CROSS_COMPILE=../gcc/bin/aarch64-linux-gnu- \ make PLAT=juno DEBUG=1 LOG_LEVEL=40 \ BL33=../out/SOFTWARE/bl33-uboot.bin \ SCP_BL2=../out/SOFTWARE/scp_bl2.bin \ CSS_USE_SCMI_SDS_DRIVER=1 \ SPD=tspd \ all fip
This will let you successfully boot when using the Linaro Release 17.07 board files.
To see the TSP output, attach an RS232 10-pin to DB9 connector to the J55 header on your Juno:
The UART uses the same 115200 8N1 setup as the main UARTs on the back of the board. You should see messages like this printed there:
INFO: TSP: cpu 0x80000100: 340 smcs, 340 erets 170 cpu suspend requests INFO: TSP: cpu 0x80000100 resumed. maximum off power level 1 INFO: TSP: cpu 0x80000100: 341 smcs, 341 erets 170 cpu suspend requests INFO: TSP: cpu 0x80000100: 342 smcs, 342 erets 171 cpu suspend requests INFO: TSP: cpu 0x80000100 resumed. maximum off power level 1 INFO: TSP: cpu 0x80000100: 343 smcs, 343 erets 171 cpu suspend requests INFO: TSP: cpu 0x80000100: 344 smcs, 344 erets 172 cpu suspend requests INFO: TSP: cpu 0x80000100 resumed. maximum off power level 1 INFO: TSP: cpu 0x80000100: 345 smcs, 345 erets 172 cpu suspend requests INFO: TSP: cpu 0x80000100: 346 smcs, 346 erets 173 cpu suspend requests INFO: TSP: cpu 0x80000100 resumed. maximum off power level 1 INFO: TSP: cpu 0x80000100: 347 smcs, 347 erets 173 cpu suspend requests INFO: TSP: cpu 0x80000100: 348 smcs, 348 erets 174 cpu suspend requests
Hope that helps,Ash.
Thank you very much, Ash! I think I can get the correct output now. I'm sorry that I don't see the last message about sending email to the support team. Have a good day.
No problem at all, glad to be of help :)
Hi Ash Wilding,
I just got a follow-up question about this problem so I guess it's better just put my question there.
As the Juno technical reference manual mentions, the physical address of Juno r1's DRAM is sitting on the range: 0x80000000-0x10000000 and 0x880000000-0x100000000, while according to my experience the current ARM-TF is setting the secure world's both max virtual and max physical address within 32 bits. In this case, I'm wondering how can I access the DRAM range 0x880000000-0x100000000 from the secure world? Thank you in advance.
When you say "from the secure world", do you mean from the context of Arm Trusted Firmware? Or are you running your own software, whether that be at EL3 or Secure EL1?
Assuming you're running your own software, you will be using your own translation regime (whether that be because you've reconfigured the MMU at EL3, or you're using Secure EL1's separate MMU), and therefore ATF's translation regime won't matter. To access those regions of DRAM, you simply need to map them in your translation tables :-) If you're running from a context of Arm Trusted Firmware then you'll need to patch it to map those regions of DRAM in its translation tables.
You might also have to reconfigure the TZC-400, as outlined in this tutorial.
Hope that helps.
Kind regards,
Ash.
Hi Ash, I was trying to access from my Secure EL1 components while I just found the solution to map the regions as you mentioned so it's solved! Thank you for the quick reply. By the way, can you please take a look at this question? https://community.arm.com/dev-platforms/f/discussions/9884/can-i-set-nic-registers-with-secure-privilege
No problem, and sure thing I'll take a look when I get a chance :)