Memory abort occurs after ISB instruction during execution of enable mmu at el3

HI Team,

We are encountering a synchronous data abort (memory abort) immediately after executing the ISB instruction in the enable_mmu_direct_el3() function in TF-A BL1 image.  We are using neoverse v2 reference design. How we can find out the root cause of this issue. The following is the reference snippet code. 

<enable_mmu_direct_el3     MRS      x4,SCTLR_EL3
<enable_mmu_direct_el3     MOV      x5,#5
<enable_mmu_direct_el3     MOVK     x5,#8,LSL #16
<enable_mmu_direct_el3     ORR      x4,x4,x5
<enable_mmu_direct_el3     AND      x5,x4,#0xfffffffffffffffb
<enable_mmu_direct_el3     TST      x7,#1
<enable_mmu_direct_el3     CSEL     x4,x5,x4,NE
<enable_mmu_direct_el3     MSR      SCTLR_EL3,x4
<enable_mmu_direct_el3     ISB
<enable_mmu_direct_el3     RET

Register values when issue occured.

ESR_EL3 : 0x0000000086000014
SCTLR_EL3: 0x0000000030ed183f

 FAR_EL3:0x0000000000010200

Parents
  • The ISB ensures that previous changes to context (in this case, the write to SCTLR) are visible to following instructions.  Without knowing what SCTLR_EL3 was previously set to, my guess is that it's the effect of enabling the MMU which is causing the problem.

    If I've got my mental hex decoding correct, ESR_EL3.EC is reporting an Instruction Abort and ISS is reporting sync External abort on table walk.  Meaning that it was unable to fetch the needed translation table entry to process an instruction fetch.

    You'll need to check the rest of the MMU set up to make sure the translation tables are in the correct place.

Reply
  • The ISB ensures that previous changes to context (in this case, the write to SCTLR) are visible to following instructions.  Without knowing what SCTLR_EL3 was previously set to, my guess is that it's the effect of enabling the MMU which is causing the problem.

    If I've got my mental hex decoding correct, ESR_EL3.EC is reporting an Instruction Abort and ISS is reporting sync External abort on table walk.  Meaning that it was unable to fetch the needed translation table entry to process an instruction fetch.

    You'll need to check the rest of the MMU set up to make sure the translation tables are in the correct place.

Children
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