I am going to design an APB Slave controller which is based on Waveform but I have a few doubts related to logic. I am a little bit confused about the phases which are dependent on PSEL and PENABLE signals and the logic of the current and next state of APB FSM. Can anyone please explain the APB FSM state diagram and state table based on the waveform mentioned in the APB Spec and the logic of the current and next states?
I am new to RTL design but I wrote logic for APB FSM based on Waveform, please find the mistakes and suggest them to me.
always @(*) begin
case(current_state)
IDLE:
if(PSel == 1)
next_state = SETUP;
else if(PSel == 0)
next_state = IDLE;
SETUP:
if(PEnable == 1)
next_state = ACCESS;
ACCESS:
if(PEnable == 0 && PSel == 0)
else if(PEnable == 0 && PSel == 1)
endcase
end