I am working on hypervisor with raspberry pi 4B board.when I study interrupt virtualization, I encounter a problem, I am follow this documenthttps://developer.arm.com/documentation ... exceptions
There are two mechanisms for generating virtual interrupts:1 Internally by the core, using controls in HCR_EL2.2 Using a GICv2, or later, interrupt controller.
I use method 1. Everything worked fine, I can route IRQ to my EL2 code, and I can forward it to EL1 Linux kernel.But, when I tested, I tried to disable IRQ from EL1, use "msr daifset, #0xf", after this, IRQ will not trigger to EL2 also.I am confused, because the document above said pstate.I will only affect vIRQ(for EL1) not pIRQ(EL2). I tested a GPIO interrupt and IPI interrupt, both failed.I search the web, there are few article on this topic, and can't find any additional settings.All document I found, said set I bit in EL1, will not affect EL2/3.
Thanks, if anyone can help.
Maybe I did not clearly my problem.
Now I can handle interrupt in EL2 in my hypervisor code, and also can forward them to linux kernel, normally it works well, the system works fine, just like no hypervisor. But as I test, I set daif bit to disable interrupt in linux kernel which run in EL1, I believe this will only mask the irq to EL1, and my hypervisor code in EL2 will still get the IRQ, surprisingly, it didn't.
I do not use the function of VGIC, I use arm virtualization. I set hcr.imo to 1, this leads the irq routed to EL2, in EL2 IRQ handler, I recorded the irqs and set hcr.vi to interrupt kernel, at same time, I will trap any access of GIC cpu interface from EL1 to EL2, and simulate the actions. All these are going well normally. The only problem is when I mask irq in EL1, EL2 also can't get any interrupt.