Dear all,
Can anyone help me in better understanding/correcting the below
Memory mapped IO means that an address range is directly mapped to physical addresses (devices). Any access to MMIO region bypass the MMU (and perhaps bypass cache as well.). As an ARM example the GIC is a typical MMIO?
- When a Linux process want to access to access an ARM MMIO say at 0xAAAAFFFF, how is this access accomplished,? how does the system/runtime knows that this is is an actual physical address to bypass the MMU. Or otherwise the this MMIO must be first mapped into the accessing process virtual address space and subjected to typical VA-PA translation mechanism ...
-In case the platform has a master bus peripheral which can generate addresses on the bus for read write and having the same view of memory and shared hardware. Are the agent addresses independent 'virtual addresses' that must be mapped to physical ones througth the SMMU and the IO page table. Can anyone explain to me what happen exactly?
Thank you so much