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aarch64 banked / common system registers

Hi !

I'm slowing learning about the differences between armv7 and v8, and I'm wondering where all the banked system registers (like TTBR0 for example) have gone ?

From what I understand in the documentation, if EL3 is aarch64, then almost no system register are banked by security in aarch64 context. It is up to the secure monitor at EL3

to save/restore them all.

 

Are all system register common now ? Is there a list of the banked / common register available, so I don't forget about one of them ? I'll have a look at the ATF to see if I can find some input there.

 

Best,

V.

  • This is partly correct. These registers are banked by Exception level rather than Security state in AArch64. E.g. TTBR0_EL1, TTBR0_EL2, TTBR0_EL3. The Secure Monitor at EL3 has to context switch the "EL1" registers.

    However, the behavior in AArch32 is not changed, although this is only if EL3 is using AArch32. So if EL3 is using AArch32 you still have TTBR0_ns and TTBR0_s Banked registers, as well as the HTTBR register for Hyp Mode.

    If EL3 is using AArch64 then it is context switching TTBR0_EL1 (which is architecturally mapped to the AArch32 TTBR0) so the illusion that there is a Banked TTBR0 between Secure EL1 using AArch32 and Non-secure EL1 using AArch32 is maintained.