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Juno r0 does not boot with linaro android after u-boot

Hi, 

I am using Juno r0, and want to run android on that. 

So, I tried to work with 1) prebuilt linaro repo, 2) build from source for linaro 16.12.

However, it does not working after u-boot.

In fact, it seems like it stops in the middle of u-boot.

When I stop the boot process in the u-boot, the entire board stops in a few second. 

When it stops, u-boot terminal console does not work, and I cannot give any input to boot command to u-boot.

It seems like I am working with wrong version.

 

Please let me know whether the latest linaro version does not work with Juno r0.

In addition, if it is the case, please let me know which is the correct version I can work with.

 

Regards,

Parents
  • The followings are bootlog from the serial console.
    --

    ARM V2M_Juno Firmware v1.4.4
    Build Date: Jul 26 2016

    Time : 13:27:08
    Date : 11:01:2017

    Press Enter to stop auto boot...


    Powering up system...

    Switching on ATXPSU...
    PMIC RAM configuration (pms_v103.bin)...
    MBtemp : 35 degC

    Configuring motherboard (rev B, var B)...
    IOFPGA image \MB\HBI0262B\io_b118.bit
    IOFPGA config: PASSED
    OSC CLK config: PASSED

    Configuring SCC registers...
    Writing SCC 0x00000054 with 0x0007FFFE
    Writing SCC 0x0000005C with 0x00FE001E
    Writing SCC 0x00000100 with 0x003F1000
    Writing SCC 0x00000104 with 0x0001F300
    Writing SCC 0x00000108 with 0x00371000
    Writing SCC 0x0000010C with 0x0001B300
    Writing SCC 0x00000118 with 0x003F1000
    Writing SCC 0x0000011C with 0x0001F100
    Writing SCC 0x000000F8 with 0x0BEC0000
    Writing SCC 0x000000FC with 0xABE40000
    Writing SCC 0x0000000C with 0x000000C2
    Writing SCC 0x00000010 with 0x000000C2

    Peripheral ID0:0x000000AD
    Peripheral ID1:0x000000B0
    Peripheral ID2:0x0000000B
    Peripheral ID3:0x00000000
    Peripheral ID4:0x0000000D
    Peripheral ID5:0x000000F0
    Peripheral ID6:0x00000005
    Peripheral ID7:0x000000B1

    Programming NOR Flash
    PCIE clock configured...

    Testing motherboard interfaces (FPGA build 118)...
    SRAM 32MB test: PASSED
    LAN9118 test: PASSED
    KMI1/2 test: PASSED
    MMC test: PASSED
    PB/LEDs test: PASSED
    FPGA UART test: PASSED
    PCIe init test: PASSED
    MAC addrs test: PASSED

    SMC MAC address 0002-F700-5B17
    Setting HDMI0 mode for SVGA.
    Setting HDMI1 mode for SVGA.

    SoC SMB clock enabled.

    Testing SMB clock...
    SMB clock running
    Releasing system resets...

    UART0 set to SoC UART0
    UART1 set to SoC UART1

    NOTICE: Booting Trusted Firmware
    NOTICE: BL1: v1.3(debug):c59428b
    NOTICE: BL1: Built : 11:35:08, Jan 9 2017
    INFO: BL1: RAM 0x4037000 - 0x4040000
    INFO: Using crypto library 'mbed TLS'
    INFO: BL1: Loading BL2
    INFO: Loading image id=6 at address 0x4006000
    INFO: Skip reserving region [base = 0x4006000, size = 0x37f]
    INFO: Image id=6 loaded at address 0x4006000, size = 0x37f
    INFO: Loading image id=1 at address 0x4006000
    INFO: Image id=1 loaded at address 0x4006000, size = 0x11158
    NOTICE: BL1: Booting BL2
    INFO: Entry point address = 0x4006000
    INFO: SPSR = 0x3c5
    NOTICE: BL2: v1.3(debug):c59428b
    NOTICE: BL2: Built : 11:35:08, Jan 9 2017
    INFO: Using crypto library 'mbed TLS'
    INFO: BL2: Loading SCP_BL2
    INFO: Loading image id=7 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x5ae]
    INFO: Image id=7 loaded at address 0x4023000, size = 0x5ae
    INFO: Loading image id=8 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x47a]
    INFO: Image id=8 loaded at address 0x4023000, size = 0x47a
    INFO: Loading image id=12 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x389]
    INFO: Image id=12 loaded at address 0x4023000, size = 0x389
    INFO: Loading image id=2 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0xeadc]
    INFO: Image id=2 loaded at address 0x4023000, size = 0xeadc
    INFO: BL2: Initiating SCP_BL2 transfer to SCP
    INFO: BL2: SCP_BL2 transferred to SCP
    INFO: Configuring TrustZone Controller
    INFO: BL2: Loading BL31
    INFO: Loading image id=9 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x47a]
    INFO: Image id=9 loaded at address 0x4023000, size = 0x47a
    INFO: Loading image id=13 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x389]
    INFO: Image id=13 loaded at address 0x4023000, size = 0x389
    INFO: Loading image id=3 at address 0x4023000
    INFO: Image id=3 loaded at address 0x4023000, size = 0xc020
    INFO: BL2: Loading BL32
    INFO: Loading image id=10 at address 0xff000000
    INFO: Skip reserving region [base = 0xff000000, size = 0x488]
    INFO: Image id=10 loaded at address 0xff000000, size = 0x488
    INFO: Loading image id=14 at address 0xff000000
    INFO: Skip reserving region [base = 0xff000000, size = 0x397]
    INFO: Image id=14 loaded at address 0xff000000, size = 0x397
    INFO: Loading image id=4 at address 0xff000000
    INFO: Image id=4 loaded at address 0xff000000, size = 0x393a8
    INFO: BL2: Loading BL33
    INFO: Loading image id=11 at address 0xe0000000
    INFO: Skip reserving region [base = 0xe0000000, size = 0x48b]
    INFO: Image id=11 loaded at address 0xe0000000, size = 0x48b
    INFO: Loading image id=15 at address 0xe0000000
    INFO: Skip reserving region [base = 0xe0000000, size = 0x39a]
    INFO: Image id=15 loaded at address 0xe0000000, size = 0x39a
    INFO: Loading image id=5 at address 0xe0000000
    INFO: Image id=5 loaded at address 0xe0000000, size = 0x3f1c8
    NOTICE: BL1: Booting BL31
    INFO: Entry point address = 0x4023000
    INFO: SPSR = 0x3cd
    NOTICE: BL31: v1.3(debug):c59428b
    NOTICE: BL31: Built : 11:35:08, Jan 9 2017
    INFO: ARM GICv2 driver initialized
    INFO: BL31: Initializing runtime services
    INFO: BL31: Initializing BL32
    INFO: BL31: Preparing for EL3 exit to normal world
    INFO: Entry point address = 0xe0000000
    INFO: SPSR = 0x3c9


    U-Boot 2016.11-ge0c6272 (Jan 09 2017 - 11:37:45 +0900) vexpress_aemv8a

    DRAM: 8 GiB
    PCIe XR3 Host Bridge enabled: x4 link (Gen 2)
    Flash: 64 MiB
    *** Warning - bad CRC, using default environment

    In: serial_pl01x
    Out: serial_pl01x
    Err: serial_pl01x
    Net: smc911x-0
    Hit any key to stop autoboot: 0
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Reply
  • The followings are bootlog from the serial console.
    --

    ARM V2M_Juno Firmware v1.4.4
    Build Date: Jul 26 2016

    Time : 13:27:08
    Date : 11:01:2017

    Press Enter to stop auto boot...


    Powering up system...

    Switching on ATXPSU...
    PMIC RAM configuration (pms_v103.bin)...
    MBtemp : 35 degC

    Configuring motherboard (rev B, var B)...
    IOFPGA image \MB\HBI0262B\io_b118.bit
    IOFPGA config: PASSED
    OSC CLK config: PASSED

    Configuring SCC registers...
    Writing SCC 0x00000054 with 0x0007FFFE
    Writing SCC 0x0000005C with 0x00FE001E
    Writing SCC 0x00000100 with 0x003F1000
    Writing SCC 0x00000104 with 0x0001F300
    Writing SCC 0x00000108 with 0x00371000
    Writing SCC 0x0000010C with 0x0001B300
    Writing SCC 0x00000118 with 0x003F1000
    Writing SCC 0x0000011C with 0x0001F100
    Writing SCC 0x000000F8 with 0x0BEC0000
    Writing SCC 0x000000FC with 0xABE40000
    Writing SCC 0x0000000C with 0x000000C2
    Writing SCC 0x00000010 with 0x000000C2

    Peripheral ID0:0x000000AD
    Peripheral ID1:0x000000B0
    Peripheral ID2:0x0000000B
    Peripheral ID3:0x00000000
    Peripheral ID4:0x0000000D
    Peripheral ID5:0x000000F0
    Peripheral ID6:0x00000005
    Peripheral ID7:0x000000B1

    Programming NOR Flash
    PCIE clock configured...

    Testing motherboard interfaces (FPGA build 118)...
    SRAM 32MB test: PASSED
    LAN9118 test: PASSED
    KMI1/2 test: PASSED
    MMC test: PASSED
    PB/LEDs test: PASSED
    FPGA UART test: PASSED
    PCIe init test: PASSED
    MAC addrs test: PASSED

    SMC MAC address 0002-F700-5B17
    Setting HDMI0 mode for SVGA.
    Setting HDMI1 mode for SVGA.

    SoC SMB clock enabled.

    Testing SMB clock...
    SMB clock running
    Releasing system resets...

    UART0 set to SoC UART0
    UART1 set to SoC UART1

    NOTICE: Booting Trusted Firmware
    NOTICE: BL1: v1.3(debug):c59428b
    NOTICE: BL1: Built : 11:35:08, Jan 9 2017
    INFO: BL1: RAM 0x4037000 - 0x4040000
    INFO: Using crypto library 'mbed TLS'
    INFO: BL1: Loading BL2
    INFO: Loading image id=6 at address 0x4006000
    INFO: Skip reserving region [base = 0x4006000, size = 0x37f]
    INFO: Image id=6 loaded at address 0x4006000, size = 0x37f
    INFO: Loading image id=1 at address 0x4006000
    INFO: Image id=1 loaded at address 0x4006000, size = 0x11158
    NOTICE: BL1: Booting BL2
    INFO: Entry point address = 0x4006000
    INFO: SPSR = 0x3c5
    NOTICE: BL2: v1.3(debug):c59428b
    NOTICE: BL2: Built : 11:35:08, Jan 9 2017
    INFO: Using crypto library 'mbed TLS'
    INFO: BL2: Loading SCP_BL2
    INFO: Loading image id=7 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x5ae]
    INFO: Image id=7 loaded at address 0x4023000, size = 0x5ae
    INFO: Loading image id=8 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x47a]
    INFO: Image id=8 loaded at address 0x4023000, size = 0x47a
    INFO: Loading image id=12 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x389]
    INFO: Image id=12 loaded at address 0x4023000, size = 0x389
    INFO: Loading image id=2 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0xeadc]
    INFO: Image id=2 loaded at address 0x4023000, size = 0xeadc
    INFO: BL2: Initiating SCP_BL2 transfer to SCP
    INFO: BL2: SCP_BL2 transferred to SCP
    INFO: Configuring TrustZone Controller
    INFO: BL2: Loading BL31
    INFO: Loading image id=9 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x47a]
    INFO: Image id=9 loaded at address 0x4023000, size = 0x47a
    INFO: Loading image id=13 at address 0x4023000
    INFO: Skip reserving region [base = 0x4023000, size = 0x389]
    INFO: Image id=13 loaded at address 0x4023000, size = 0x389
    INFO: Loading image id=3 at address 0x4023000
    INFO: Image id=3 loaded at address 0x4023000, size = 0xc020
    INFO: BL2: Loading BL32
    INFO: Loading image id=10 at address 0xff000000
    INFO: Skip reserving region [base = 0xff000000, size = 0x488]
    INFO: Image id=10 loaded at address 0xff000000, size = 0x488
    INFO: Loading image id=14 at address 0xff000000
    INFO: Skip reserving region [base = 0xff000000, size = 0x397]
    INFO: Image id=14 loaded at address 0xff000000, size = 0x397
    INFO: Loading image id=4 at address 0xff000000
    INFO: Image id=4 loaded at address 0xff000000, size = 0x393a8
    INFO: BL2: Loading BL33
    INFO: Loading image id=11 at address 0xe0000000
    INFO: Skip reserving region [base = 0xe0000000, size = 0x48b]
    INFO: Image id=11 loaded at address 0xe0000000, size = 0x48b
    INFO: Loading image id=15 at address 0xe0000000
    INFO: Skip reserving region [base = 0xe0000000, size = 0x39a]
    INFO: Image id=15 loaded at address 0xe0000000, size = 0x39a
    INFO: Loading image id=5 at address 0xe0000000
    INFO: Image id=5 loaded at address 0xe0000000, size = 0x3f1c8
    NOTICE: BL1: Booting BL31
    INFO: Entry point address = 0x4023000
    INFO: SPSR = 0x3cd
    NOTICE: BL31: v1.3(debug):c59428b
    NOTICE: BL31: Built : 11:35:08, Jan 9 2017
    INFO: ARM GICv2 driver initialized
    INFO: BL31: Initializing runtime services
    INFO: BL31: Initializing BL32
    INFO: BL31: Preparing for EL3 exit to normal world
    INFO: Entry point address = 0xe0000000
    INFO: SPSR = 0x3c9


    U-Boot 2016.11-ge0c6272 (Jan 09 2017 - 11:37:45 +0900) vexpress_aemv8a

    DRAM: 8 GiB
    PCIe XR3 Host Bridge enabled: x4 link (Gen 2)
    Flash: 64 MiB
    *** Warning - bad CRC, using default environment

    In: serial_pl01x
    Out: serial_pl01x
    Err: serial_pl01x
    Net: smc911x-0
    Hit any key to stop autoboot: 0
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