I have observed that GCC generates strange "Program header tables" in the output elf file when flash configuration of the linker script is not 16-bit aligned.
An example of the linker script that doesn't work well. Address of flash is set to non 16-bit alignment as you can see it has 0xC000 offset in the lower bytes.
MEMORY{ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x0800C000, LENGTH = 256K}When we generate elf file like thisProgram header tablesType Offset VAddr PAddr PT_LOAD 0x00000000 0x08000000 0x08000000PT_LOAD 0x00010000 0x20000000 0x08001FD4PT_LOAD 0x0000002C 0x2000002C 0x08001FE0
Why it is not aligned to the start of actual flash memory, that being 0x0800C000 and why are 2 lower bytes masked out and set to 0?If linker script is like that (so now going to 0x08010000) then it works well:
MEMORY{ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 256K}
Program header tablesType Offset VAddr PAddr PT_LOAD 0x00000000 0x08010000 0x08000000PT_LOAD 0x00010000 0x20000000 0x08001FD4PT_LOAD 0x0000002C 0x2000002C 0x08001FE0
Then again one that is strange, see lower 2 bytes are not all zeros.
MEMORY{ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x0801B000, LENGTH = 256K}
What is the catch behind and why is GCC masking out lower 2 bytes?Thanks in advance, Tilen
GCC elf generation with non-aligned sections vs linker configuration. I have observed that GCC generates strange "Program header tables" in the output elf file when flash configuration of the linker script is not 16-bit aligned. An example of the linker script that doesn't work well.
NavyArmyCCU