• Locked Locked
  • Replies 9 replies
  • Subscribers 119 subscribers
  • Views 6511 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Cortex-A9 MPCore Fastmodel Trustzone support

Gopu Subramanian
Note: This was originally posted on 21st March 2012 at http://forums.arm.com

I am trying to develop an trustzone application based on ARM A9MPcore Fast model. But if I tried to enable the non-secure interrupts and it is not working. Is any one able to use the A9MPCore fast model for trustzone development.


Thanks,
Gopu
Parents
  • Arm Employee Badge
    Note: This was originally posted on 27th March 2012 at http://forums.arm.com

    What do you expect to happen for a "non-secure interrupt" and what are you actually seeing? Without more data it's hard to help.

    As far as the interrupt controller is concerned there is no such thing as a secure interrupt, other than non-secure software cannot configure a secure interrupt or set high priority. The interrupt handling is entirely a software problem in the ARM core, and not really very much to do with the GIC at all.

    By "not seeing any non-secure interrupt" it sounds like you think the interrupts are being generated but they are not appearing in the normal world interrupt handler?

    Ensure that you have correctly configured hardware trapping to the monitor mode for interrupts in CP15, and that your monitor software is context switching cleanly when the interrupt occurs.

    See section 3.3 of http://infocenter.arm.com/help/topic/com.arm.doc.prd29-genc-009492c/index.html for an intro.

    Iso
Reply
  • Arm Employee Badge
    Note: This was originally posted on 27th March 2012 at http://forums.arm.com

    What do you expect to happen for a "non-secure interrupt" and what are you actually seeing? Without more data it's hard to help.

    As far as the interrupt controller is concerned there is no such thing as a secure interrupt, other than non-secure software cannot configure a secure interrupt or set high priority. The interrupt handling is entirely a software problem in the ARM core, and not really very much to do with the GIC at all.

    By "not seeing any non-secure interrupt" it sounds like you think the interrupts are being generated but they are not appearing in the normal world interrupt handler?

    Ensure that you have correctly configured hardware trapping to the monitor mode for interrupts in CP15, and that your monitor software is context switching cleanly when the interrupt occurs.

    See section 3.3 of http://infocenter.arm.com/help/topic/com.arm.doc.prd29-genc-009492c/index.html for an intro.

    Iso
Children
No data