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NEON conditional execution

Laurent Ovaert
Note: This was originally posted on 17th February 2012 at http://forums.arm.com

Hi, I would like to perform the following operation simultaneously on 8x16bits registers:

Q0 = Q0 + Q1
if (Q0 >= Q2) Q0 = Q3

I am not clear if this is possible to do that ?
In normal mode, I know it is since the mov can be conditional, but in SIMD I don't know.
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  • Arm Employee Badge
    Note: This was originally posted on 20th February 2012 at http://forums.arm.com

    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]> I wonder what is the technological problem in doing this in the chip[/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]
    [/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]Isn't that really exactly what the VBIT instruction does, except that it does so in a manner which is (1) generic and fairly flexible so you can use it for other things and (2) it doesn't need a load of extra special logic just for this specific use.[/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]
    [/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]The only downside of the current NEON approach is that you need one extra register to store the condition pattern, but this is rarely an issue in most algorithms.[/size][/font][/color]
Reply
  • Arm Employee Badge
    Note: This was originally posted on 20th February 2012 at http://forums.arm.com

    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]> I wonder what is the technological problem in doing this in the chip[/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]
    [/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]Isn't that really exactly what the VBIT instruction does, except that it does so in a manner which is (1) generic and fairly flexible so you can use it for other things and (2) it doesn't need a load of extra special logic just for this specific use.[/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]
    [/size][/font][/color]
    [color=#222222][font=Arial, Verdana, Tahoma, sans-serif][size=2]The only downside of the current NEON approach is that you need one extra register to store the condition pattern, but this is rarely an issue in most algorithms.[/size][/font][/color]
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